1 Introduction
2 ------------
3
4 The ArduinoAm29F010 project provides software and a circuit to program
5 Am29F010 flash memory devices using an Arduino board (tested with the Arduino
6 Duemilanove, but likely to work with the Arduino Uno and directly-related
7 boards). In addition, guidance about the use of such flash memory devices is
8 provided for use with microcomputer systems, such as the Acorn Electron and
9 BBC Microcomputer range.
10
11 The Am29F010-90PC product has been used to test the software and hardware
12 design described here. The PDIP variant of the device, as opposed to the
13 various other packages employed in the product range, is the variant most
14 suitable for use with the Arduino.
15
16 It is attractive to try and use such flash memory devices as an alternative to
17 EPROM devices, mostly for the practicality and increased convenience involved
18 in programming them, needing only a suitably-wired circuit and conventional
19 microcomputer/microcontroller voltage levels. It is also interesting to try
20 and make the extra space provided by such devices available to the systems in
21 which they will be deployed.
22
23 Contact, Copyright and Licence Information
24 ------------------------------------------
25
26 The author can be contacted at the following e-mail address:
27
28 paul@boddie.org.uk
29
30 Copyright and licence information can be found in the docs directory - see
31 docs/COPYING.txt and docs/gpl-3.0.txt for more information.
32
33
34
35 Using the Software
36 ==================
37
38 First of all, to use the Arduino-based programming solution, the Arduino needs
39 to have a program transferred to it. The program is compiled using the
40 Makefile provided, using the simple command...
41
42 make
43
44 To upload the program, the "upload" target is used as follows:
45
46 make upload
47
48 It is likely that this will fail unless appropriate permissions are available
49 on the device through which the Arduino is accessed on the host machine. Thus,
50 a privileged invocation is likely to be necessary:
51
52 sudo make upload
53
54 Configuring the Software
55 ------------------------
56
57 By default, the software is configured for a circuit using 74HC273 flip-flop
58 integrated circuits. In the Makefile, the CIRCUIT variable is set as follows:
59
60 CIRCUIT = 74HC273
61
62 To change this to support 74HC595 shift register integrated circuits, the
63 variable is set as follows:
64
65 CIRCUIT = 74HC595
66
67 Clean the generated files and run make again after reconfiguring:
68
69 make clean && make
70
71 Testing the Program
72 -------------------
73
74 With the program uploaded, it should now be possible to communicate with the
75 Arduino. Unless the programming circuit has been constructed, however, there
76 will not be any effect of communicating with the Arduino, other than to check
77 that the program is operational. Running the upload.py script as follows will
78 permit such a test:
79
80 ./upload.py -i
81
82 Again, it is likely that this will need to be run in a privileged fashion as
83 follows:
84
85 sudo ./upload.py -i
86
87 The script should act as a terminal, showing a ">" prompt that can accept
88 various commands. Merely getting the prompt should be enough of an indication
89 that the program is functioning on the device.
90
91 Issuing read commands permits the testing of addresses in the device:
92
93 location sector
94 R00000 0x0000 0 (the first location in the device)
95 R07fff 0x7fff 1 (the final location in sector 1)
96 R10000 0x10000 4 (the first location in sector 4)
97 R1ffff 0x1ffff 7 (the final location in the device)
98
99 Uploading and Testing Images
100 ----------------------------
101
102 Once the programming circuit has been constructed (see "Arduino Interfacing"
103 below), the upload.py script can be used to upload data to the Am29F010
104 device. For example:
105
106 sudo ./upload.py jungle.rom
107
108 This will take jungle.rom and write it to the first sector of the Am29F010. To
109 verify the operation, the following command can be used:
110
111 sudo ./upload.py -v jungle.rom
112
113 To write to other sectors, an option can be specified. For example:
114
115 sudo ./upload.py -s 1 junglecode.rom
116
117 Again, the operation can be verified as follows:
118
119 sudo ./upload.py -s 1 -v junglecode.rom
120
121 Note that the -s option must appear first.
122
123 The upload.py script can accept multiple files and will write each of them to
124 consecutive sectors. However, it can be more prudent to write files
125 individually, especially if the circuit is behaving in a less than completely
126 reliable fashion.
127
128 A Note on Sectors
129 -----------------
130
131 Each sector is 16 kilobytes long, which corresponds to a 14-bit address range
132 (0x0000 to 0x3FFF). The Arduino interface described below supports 17-bit
133 addressing (A0...A16), permitting access to eight sectors (at 0x0000, 0x4000,
134 0x8000, 0xC000, 0x10000, 0x14000, 0x18000 and 0x1C000). The simple mapping from
135 a ROM cartridge to the device leaves A16 grounded and thus unable to access the
136 upper four sectors in the device. However, A16 could be connected to VCC to
137 access the upper four sectors.
138
139
140
141 Making a Printed Circuit Board
142 ==============================
143
144 The pcb directory contains resources for making a PCB with the Fritzing
145 software. In order to track changes in these resources, they have been
146 unpacked from a file saved by Fritzing, and so must be packed together into
147 such a file before being given to Fritzing. This can be done using a script
148 provided:
149
150 ./make_pcb.sh
151
152 This will produce a file called ArduinoAm29F010-arduinouno.fzz containing the
153 resources in a zip archive as Fritzing expects.
154
155 This PCB is featured as a project on the Fritzing Web site:
156
157 http://fritzing.org/projects/arduino-am29f010-programming-shield
158
159
160
161 Device Compatibility
162 ====================
163
164 For use with an Acorn Electron ROM cartridge or other board providing a ROM
165 socket, the compatibility of the Am29F010 needs to be assessed in the context
166 of the ROM sockets likely to be provided.
167
168 Original ROM Pinout Am29F010 Pinout
169 ------------------- ---------------
170
171 1 \/ 32 VCC
172 A16 2 31 WE#
173 1 \/ 28 VCC A15 3 30
174 A12 2 27 A14 A12 4 29 A14
175 A7 3 26 A13 A7 5 28 A13
176 A6 4 25 A8 A6 6 27 A8
177 A5 5 24 A9 A5 7 26 A9
178 A4 6 23 A11 A4 8 25 A11
179 A3 7 22 OE# A3 9 24 OE#
180 A2 8 21 A10 A2 10 23 A10
181 A1 9 20 CS# A1 11 22 CE#
182 A0 10 19 D7 A0 12 21 DQ7
183 D0 11 18 D6 DQ0 13 20 DQ6
184 D1 12 17 D5 DQ1 14 19 DQ5
185 D2 13 16 D4 DQ2 15 18 DQ4
186 GND 14 15 D3 GND/VSS 16 17 DQ3
187
188 Superimposing the Am29F010 onto a ROM socket would provide compatibility for
189 all pins from A12 to GND/VSS and from A14 to D3/DQ3.
190
191 Pin 1 in a ROM socket would correspond to A15 but is not necessarily
192 connected, nor, perhaps, is A14 since only 14 bits are required to address 16
193 kilobytes, although there may be 32 kilobyte sockets connecting A14 and using
194 15 bits to address 32K. A16 and A15 would probably be connected to ground to
195 ensure correct operation, but could also be wired to a selection mechanism so
196 that the entire contents of the flash memory might be exposed.
197
198 Pin 28 in a ROM socket would provide power, but the corresponding pin 30 on an
199 Am29F010 is not connected. Thus pin 30 would need routing to pin 32 for the
200 flash device socket.
201
202 Pin 31 for the Am29F010 would need to be asserted. Thus pin 30 might also be
203 routed to pin 31, so that the device would remain read-only at all times.
204
205 Pins
206 ----
207
208 A0-A16 17-bit addressing
209 DQ0-DQ7 8-bit data transfer
210 CE# chip enable
211 OE# output enable
212 WE# write enable
213 VCC 5V
214 VSS ground
215 NC (not connected)
216
217
218
219 Dual ROM Adapter Usage
220 ======================
221
222 A single Am29F010 device could be wired to two ROM sockets in order to provide
223 data to both. The above wiring guide would be employed, with connections from
224 both sockets being connected to the Am29F010, but additional logic would be
225 required for the CS# signals originating from the sockets in order to expose
226 the appropriate region of flash memory. ROM #1 would be served by a "lower"
227 16K region; ROM #2 would be served by an "upper" 16K region; A14 would be used
228 to switch between these regions.
229
230 When ROM #1's CS# signal is low, an attempt to read from ROM #1 would be
231 occurring, and thus A14 would be held low. And when ROM #2's CS# signal is
232 low, an attempt to read from ROM #2 would be occurring, and thus A14 would be
233 held high.
234
235 Meanwhile, the CS# signal for the two ROM sockets would need to be combined to
236 produce a resultant CE# signal for the Am29F010.
237
238 ROM #1 CS# ROM #2 CS# Am29F010 A14 Am29F010 CE#
239 ---------- ---------- ------------ ------------
240 0 0 Not defined Not defined
241 0 1 0 0
242 1 0 1 0
243 1 1 Not defined 1
244
245 It might therefore be possible to connect A14 to ROM #1's CS# signal. And the
246 resultant CE# signal could be the product of an AND gate:
247
248 Am29F010 CE# = ROM #1 CS# AND ROM #2 CS#
249
250 Wiring Details
251 --------------
252
253 ROM #1 ROM #2 74HC08 Am29F010
254 ------ ------ ------ --------
255 CS# 1A A14
256 CS# 1B
257 1Y CE#
258 OE# OE#
259
260 ROM (Common) 74HC08 Am29F010
261 ------------ ------ --------
262 VCC VCC
263 GND GND
264 VCC VCC
265 VCC WE#
266 D0 DQ0
267 D1 DQ1
268 D2 DQ2
269 D3 DQ3
270 D4 DQ4
271 D5 DQ5
272 D6 DQ6
273 D7 DQ7
274 A0 A0
275 A1 A1
276 A2 A2
277 A3 A3
278 A4 A4
279 A5 A5
280 A6 A6
281 A7 A7
282 A8 A8
283 A9 A9
284 A10 A10
285 A11 A11
286 A12 A12
287 A13 A13
288 GND A15
289 GND A16
290 GND GND
291
292 Note that A15 and A16 are left grounded, effectively exposing only the first
293 two sectors of the device. By connecting either or both of these to VCC, other
294 pairs of sectors can be manually selected. A mechanism could also be devised
295 to allow selection using logic, but this is not explored here.
296
297 74HC08 Pinout
298 -------------
299
300 1A 1 \/ 14 VCC
301 1B 2 13 4B
302 1Y 3 12 4A
303 2A 4 11 4Y
304 2B 5 10 3B
305 2Y 6 9 3A
306 GND 7 8 3Y
307
308
309
310 Arduino Interfacing
311 ===================
312
313 Arduino can employ at most 14 digital pins (plus 5 switchable analogue pins),
314 whereas the Am29F010B requires 17 address pins, 8 data pins, plus 3 control
315 pins to be utilised. (Note that digital pin 13 also drives an LED and pins 0
316 and 1 are unavailable if the serial interface is being used.)
317
318 Using 74HC273 Flip-Flops
319 ------------------------
320
321 One solution is to map the 3 control pins directly to the Arduino, then to
322 channel addresses and data via 8 common pins, with addresses being stored in
323 latches or flip-flops, and then to employ two remaining pins to control the
324 latches. When neither latch is selected, the data pins will be used to read or
325 write data from the flash memory.
326
327 In this scheme, A16 must be directly controlled by an additional pin, separate
328 from the latch-based mechanism. As a result, only 14 pins are needed on the
329 Arduino.
330
331 Arduino 74HC273 #1 74HC273 #2 Am29F010
332 ------- ---------- ---------- --------
333 A5 CE#
334 A4 OE#
335 A3 WE#
336 2 CP
337 3 CP
338 4 D3 D3 DQ3
339 5 D2 D2 DQ2
340 6 D1 D1 DQ1
341 7 D0 D0 DQ0
342 8 D4 D4 DQ4
343 9 D5 D5 DQ5
344 10 D6 D6 DQ6
345 11 D7 D7 DQ7
346 Q0 A0
347 Q1 A1
348 Q2 A2
349 Q3 A3
350 Q4 A4
351 Q5 A5
352 Q6 A6
353 Q7 A7
354 Q0 A8
355 Q1 A9
356 Q2 A10
357 Q3 A11
358 Q4 A12
359 Q5 A13
360 Q6 A14
361 Q7 A15
362 A2 A16
363 5V MR# MR#
364 5V VCC VCC VCC
365 GND GND GND VSS
366
367 74HC273 Pinout
368 --------------
369
370 MR# 1 \/ 20 VCC
371 Q0 2 19 Q7
372 D0 3 18 D7
373 D1 4 17 D6
374 Q1 5 16 Q6
375 Q2 6 15 Q5
376 D2 7 14 D5
377 D3 8 13 D4
378 Q3 9 12 Q4
379 GND 10 11 CP
380
381 Set Address
382 -----------
383
384 74HC273 #1 CP = 1; 74HC273 #2 CP = 0
385 74HC273 #1 D[7...0] = A[7...0]
386 74HC273 #1 CP = 0; 74HC273 #2 CP = 1
387 74HC273 #2 D[7...0] = A[15...8]
388 Am29F010 A16 = A[16]
389
390 Write Data
391 ----------
392
393 Configure pins as D[7...0]
394 WE# = 0
395 74HC273 #1 CP = 0; 74HC273 #2 CP = 0
396 74HC273 #3 D[7...0] = D[7...0]
397 WE# = 1
398
399 Read Data
400 ---------
401
402 Configure pins as Q[7...0]
403 OE# = 0
404 74HC273 #1 CP = 1; 74HC273 #2 CP = 0
405 Q[7...0] = 74HC273 #0 Q[7...0]
406 OE# = 1
407
408 Using 74HC595 Shift Registers
409 -----------------------------
410
411 Another solution is to map the 3 control pins directly to the Arduino, then to
412 channel addresses via a single pin to a pair of shift registers, and then
413 employ two remaining pins to control the shift registers. Eight separate data
414 pins will be used to read or write data from the flash memory.
415
416 In this scheme, A16 must be directly controlled by an additional pin, separate
417 from the shift-register-based mechanism. As a result, only 15 pins are needed
418 on the Arduino.
419
420 Arduino 74HC595#1 74HC595#2 Am29F010
421 ------- --------- --------- --------
422 A5 CE#
423 A4 OE#
424 A3 WE#
425 2 SCK SCK
426 3 RCK RCK
427 4 DQ3
428 5 DQ2
429 6 DQ1
430 7 DQ0
431 8 DQ4
432 9 DQ5
433 10 DQ6
434 11 DQ7
435 12 SI
436 QA A0
437 QB A1
438 QC A2
439 QD A3
440 QE A4
441 QF A5
442 QG A6
443 QH A7
444 QA A8
445 QB A9
446 QC A10
447 QD A11
448 QE A12
449 QF A13
450 QG A14
451 QH A15
452 A2 A16
453 5V SCLR# SCLR#
454 5V VCC VCC VCC
455 GND G# G#
456 GND GND GND VSS
457
458 74HC595 Pinout
459 --------------
460
461 QB 1 \/ 16 VCC
462 QC 2 15 QA
463 QD 3 14 SI
464 QE 4 13 G#
465 QF 5 12 RCK
466 QG 6 11 SCK
467 QH 7 10 SCLR#
468 GND 8 9 QH'
469
470
471
472 Technical Notes
473 ===============
474
475 Information about the operation of the Am29F010 device can be gained from a
476 perusal of the datasheet, and a summary of some of the pertinent details can
477 be found below.
478
479 Low-Level Operations
480 --------------------
481
482 CE# high standby
483 CE# low read, write or output disable
484
485 OE# high, WE# high output disable
486 OE# low, WE# high read
487 OE# high, WE# low write
488
489 Thus, for reading and writing:
490
491 OE# = not WE#
492
493 Timing
494 ------
495
496 According to the datasheet, addresses are latched on the falling edge of the
497 latest of WE# and CE#, data is latched on the rising edge of the latest of WE#
498 and CE#.
499
500 Strategy:
501
502 1. Start with CE#, OE#, WE# high (standby, output disable)
503 2. Bring CE# low (output disable)
504 3. Set addresses
505 4. Bring WE# or OE# low for operation (write or read)
506 5. Read or write data
507 6. Bring WE# or OE# high (output disable)
508
509 Operation Modes
510 ---------------
511
512 By default, the device is in read mode, meaning that merely bringing OE# low
513 will produce data for the asserted address.
514
515 To issue commands to change the mode involves write operations with specific
516 address and data arguments.
517
518 Sectors
519 --------
520
521 A[16...14] selects each 16KB sector and is referred to as the sector address
522 or SA in the documentation.
523
524 Commands
525 --------
526
527 Reset (A=$5555; D=$AA); (A=$2AAA; D=$55); (A=$5555; D=$F0)
528
529 Autoselect (manufacturer) (A=$5555; D=$AA); (A=$2AAA; D=$55); (A=$5555; D=$90);
530 (A=$X00; read)
531 => D=$01
532
533 Autoselect (device) (A=$5555; D=$AA); (A=$2AAA; D=$55); (A=$5555; D=$90);
534 (A=$X01; read)
535 => D=$20
536
537 Simple reset (A=$XXXX; D=$F0)
538
539 Sector erase (A=$5555; D=$AA); (A=$2AAA; D=$55); (A=$5555; D=$80);
540 (A=$5555; D=$AA); (A=$2AAA; D=$55); (A=SA; D=$30)
541
542 Program (A=$5555; D=$AA); (A=$2AAA; D=$55); (A=$5555; D=$A0);
543 (A=PA; D=PD)
544
545 Note that A16 is held low when issuing the constant addresses in the above
546 commands.
547
548 Progress
549 --------
550
551 Programming and erasure commands employ data pins as follows:
552
553 Programming Erasure
554 DQ7 On completion: DQ7-out On completion: 1
555 DQ6 During: toggling value During: toggling value
556 DQ5 On failure: 1 On failure: 1
557 DQ3 Sector erase begun: 1
558
559 A read operation is required to obtain these outputs, typically with the same
560 address used to initiate each operation. The algorithm described in the
561 datasheet that tests DQ7 and DQ5 is employed to determine whether an operation
562 has completed. It should be noted that the toggling effect on DQ6 occurs from
563 read to read, not at some particular frequency.