paul@15 | 1 | /* |
paul@15 | 2 | * PIC32 peripheral access utilities. |
paul@15 | 3 | * |
paul@15 | 4 | * Copyright (C) 2018 Paul Boddie <paul@boddie.org.uk> |
paul@15 | 5 | * |
paul@15 | 6 | * This program is free software: you can redistribute it and/or modify |
paul@15 | 7 | * it under the terms of the GNU General Public License as published by |
paul@15 | 8 | * the Free Software Foundation, either version 3 of the License, or |
paul@15 | 9 | * (at your option) any later version. |
paul@15 | 10 | * |
paul@15 | 11 | * This program is distributed in the hope that it will be useful, |
paul@15 | 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
paul@15 | 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
paul@15 | 14 | * GNU General Public License for more details. |
paul@15 | 15 | * |
paul@15 | 16 | * You should have received a copy of the GNU General Public License |
paul@15 | 17 | * along with this program. If not, see <http://www.gnu.org/licenses/>. |
paul@15 | 18 | */ |
paul@15 | 19 | |
paul@0 | 20 | #ifndef __ASSEMBLER__ |
paul@0 | 21 | |
paul@0 | 22 | #ifndef __PIC32_C_H__ |
paul@0 | 23 | #define __PIC32_C_H__ |
paul@0 | 24 | |
paul@0 | 25 | #include <stdint.h> |
paul@2 | 26 | #include "mips.h" |
paul@0 | 27 | #include "pic32.h" |
paul@0 | 28 | |
paul@15 | 29 | |
paul@15 | 30 | |
paul@0 | 31 | /* Access. */ |
paul@0 | 32 | |
paul@10 | 33 | #define REG(mem) *((volatile uint32_t *) (mem)) |
paul@0 | 34 | |
paul@15 | 35 | |
paul@15 | 36 | |
paul@0 | 37 | /* Bit clearing, setting and inverting. */ |
paul@0 | 38 | |
paul@10 | 39 | static inline void CLR_REG(uint32_t mem, uint32_t val) |
paul@10 | 40 | { |
paul@10 | 41 | REG(mem + CLR) = val; |
paul@10 | 42 | } |
paul@10 | 43 | |
paul@10 | 44 | static inline void SET_REG(uint32_t mem, uint32_t val) |
paul@10 | 45 | { |
paul@10 | 46 | REG(mem + SET) = val; |
paul@10 | 47 | } |
paul@10 | 48 | |
paul@10 | 49 | static inline void INV_REG(uint32_t mem, uint32_t val) |
paul@10 | 50 | { |
paul@10 | 51 | REG(mem + INV) = val; |
paul@10 | 52 | } |
paul@0 | 53 | |
paul@15 | 54 | |
paul@15 | 55 | |
paul@2 | 56 | /* Address translation. */ |
paul@2 | 57 | |
paul@10 | 58 | static inline uint32_t PHYSICAL(uint32_t addr) |
paul@10 | 59 | { |
paul@10 | 60 | return ((uint32_t) addr) - KSEG0_BASE; |
paul@10 | 61 | } |
paul@10 | 62 | |
paul@10 | 63 | static inline uint32_t HW_PHYSICAL(uint32_t addr) |
paul@10 | 64 | { |
paul@10 | 65 | return ((uint32_t) addr) - KSEG1_BASE; |
paul@10 | 66 | } |
paul@2 | 67 | |
paul@15 | 68 | |
paul@15 | 69 | |
paul@3 | 70 | /* Register collection access. */ |
paul@3 | 71 | |
paul@10 | 72 | static inline uint32_t DMA_REG(int channel, uint32_t reg) |
paul@10 | 73 | { |
paul@10 | 74 | return DCHBASE + reg + (channel - DCHMIN) * DCHSTEP; |
paul@10 | 75 | } |
paul@10 | 76 | |
paul@14 | 77 | static inline uint32_t OC_REG(int unit, uint32_t reg) |
paul@10 | 78 | { |
paul@14 | 79 | return OCBASE + reg + (unit - OCMIN) * OCSTEP; |
paul@10 | 80 | } |
paul@10 | 81 | |
paul@32 | 82 | static inline uint32_t PM_REG(int port, uint32_t reg) |
paul@32 | 83 | { |
paul@32 | 84 | return PMBASE + reg + (port - PMMIN) * PMSTEP; |
paul@32 | 85 | } |
paul@32 | 86 | |
paul@14 | 87 | static inline uint32_t TIMER_REG(int timer, uint32_t reg) |
paul@10 | 88 | { |
paul@14 | 89 | return TIMERBASE + reg + (timer - TIMERMIN) * TIMERSTEP; |
paul@14 | 90 | } |
paul@14 | 91 | |
paul@14 | 92 | static inline uint32_t UART_REG(int uart, uint32_t reg) |
paul@14 | 93 | { |
paul@14 | 94 | return UARTBASE + reg + (uart - UARTMIN) * UARTSTEP; |
paul@10 | 95 | } |
paul@10 | 96 | |
paul@15 | 97 | |
paul@15 | 98 | |
paul@10 | 99 | /* Convenience types. */ |
paul@10 | 100 | |
paul@10 | 101 | enum dma_chain |
paul@10 | 102 | { |
paul@10 | 103 | dma_chain_none, |
paul@10 | 104 | dma_chain_next, |
paul@10 | 105 | dma_chain_previous, |
paul@10 | 106 | }; |
paul@3 | 107 | |
paul@0 | 108 | #endif /* __PIC32_C_H__ */ |
paul@0 | 109 | |
paul@0 | 110 | #endif /* __ASSEMBLER__ */ |