1.1 --- /dev/null Thu Jan 01 00:00:00 1970 +0000
1.2 +++ b/docs/wiki/Library--cpu Tue Jun 11 16:49:23 2019 +0200
1.3 @@ -0,0 +1,33 @@
1.4 += Low-Level CPU Routines =
1.5 +
1.6 +The `lib/cpu.S` file contains low-level routines for handling specific
1.7 +conditions related to the operation of the CPU:
1.8 +
1.9 + `init_interrupts` :: Configures the location of exception and interrupt
1.10 + vectors.
1.11 +
1.12 + `enable_interrupts` :: Enables the delivery of interrupts to the configured
1.13 + non-bootloader vectors.
1.14 +
1.15 + `handle_error_level`:: Handles the initial state of the CPU, making exception
1.16 + and interrupt conditions possible.
1.17 +
1.18 +These routines are called in an appropriate order in the general [[../init|
1.19 +initialisation]] code.
1.20 +
1.21 +To support exceptions and interrupts, the following routines are defined in
1.22 +the `.vectors' section of the payload:
1.23 +
1.24 + `ebase` :: Handles TLB exceptions, jumping to the general exception
1.25 + handler. The PIC32 products tested with this software do not
1.26 + provide hardware that should raise such exceptions, however.
1.27 +
1.28 + `exc_handler` :: Handles exception conditions, switching to a dedicated stack
1.29 + and jumping to the `exception_handler` routine defined by an
1.30 + application.
1.31 +
1.32 + `int_handler` :: Handles interrupt conditions, switching to a dedicated
1.33 + stack, saving register values, jumping to the
1.34 + `interrupt_handler` routine defined by an application, then
1.35 + restoring register values, switching back to the application
1.36 + stack and returning to the interrupted code.