1 #ifndef __PIC32_H__ 2 #define __PIC32_H__ 3 4 /* Peripheral addresses. 5 * See... 6 * TABLE 4-1: SFR MEMORYMAP 7 * TABLE 11-3: PORTA REGISTER MAP 8 * PIC32MX1XX/2XX 28/36/44-pin Family Data Sheet 9 */ 10 11 #define OC1CON 0xBF803000 12 #define OC1R 0xBF803010 13 #define OC1RS 0xBF803020 14 #define OC2CON 0xBF803200 15 #define OC2R 0xBF803210 16 #define OC2RS 0xBF803220 17 #define OC3CON 0xBF803400 18 #define OC3R 0xBF803410 19 #define OC3RS 0xBF803420 20 21 #define T1CON 0xBF800600 22 #define TMR1 0xBF800610 23 #define PR1 0xBF800620 24 #define T2CON 0xBF800800 25 #define TMR2 0xBF800810 26 #define PR2 0xBF800820 27 #define T3CON 0xBF800A00 28 #define TMR3 0xBF800A10 29 #define PR3 0xBF800A20 30 31 #define PMCON 0xBF807000 32 #define PMMODE 0xBF807010 33 #define PMADDR 0xBF807020 34 #define PMDOUT 0xBF807030 35 #define PMDIN 0xBF807040 36 #define PMAEN 0xBF807050 37 #define PMSTAT 0xBF807060 38 39 #define OSCCON 0xBF80F000 40 #define REFOCON 0xBF80F020 41 #define REFOTRIM 0xBF80F030 42 #define CFGCON 0xBF80F200 43 #define SYSKEY 0xBF80F230 44 45 #define U1RXR 0xBF80FA50 46 47 #define RPA0R 0xBF80FB00 48 #define RPA1R 0xBF80FB04 49 #define RPA2R 0xBF80FB08 50 #define RPA3R 0xBF80FB0C 51 #define RPA4R 0xBF80FB10 52 #define RPB0R 0xBF80FB2C 53 #define RPB1R 0xBF80FB30 54 #define RPB2R 0xBF80FB34 55 #define RPB3R 0xBF80FB38 56 #define RPB4R 0xBF80FB3C 57 #define RPB5R 0xBF80FB40 58 #define RPB10R 0xBF80FB54 59 #define RPB15R 0xBF80FB68 60 61 #define INTCON 0xBF881000 62 #define IFS0 0xBF881030 63 #define IFS1 0xBF881040 64 #define IEC0 0xBF881060 65 #define IEC1 0xBF881070 66 #define IPC1 0xBF8810A0 67 #define IPC2 0xBF8810B0 68 #define IPC3 0xBF8810C0 69 #define IPC4 0xBF8810D0 70 #define IPC5 0xBF8810E0 71 #define IPC6 0xBF8810F0 72 #define IPC7 0xBF881100 73 #define IPC8 0xBF881110 74 #define IPC9 0xBF881120 75 #define IPC10 0xBF881130 76 77 #define BMXCON 0xBF882000 78 #define BMXDKPBA 0xBF882010 79 #define BMXDUDBA 0xBF882020 80 #define BMXDUPBA 0xBF882030 81 #define BMXDRMSZ 0xBF882040 82 83 #define ANSELA 0xBF886000 84 #define TRISA 0xBF886010 85 #define PORTA 0xBF886020 86 #define LATA 0xBF886030 87 #define ODCA 0xBF886040 88 #define ANSELB 0xBF886100 89 #define TRISB 0xBF886110 90 #define PORTB 0xBF886120 91 #define LATB 0xBF886130 92 #define ODCB 0xBF886140 93 94 /* DMA conveniences. */ 95 96 #define DMACON 0xBF883000 97 #define DCH0CON 0xBF883060 98 #define DCH1CON 0xBF883120 99 #define DCH2CON 0xBF8831E0 100 #define DCH3CON 0xBF8832A0 101 102 #define DCHMIN 0 103 #define DCHMAX 3 104 #define DCHBASE DCH0CON 105 #define DCHSTEP (DCH1CON - DCH0CON) 106 107 #define DCHxCON 0x00 108 #define DCHxECON 0x10 109 #define DCHxINT 0x20 110 #define DCHxSSA 0x30 111 #define DCHxDSA 0x40 112 #define DCHxSSIZ 0x50 113 #define DCHxDSIZ 0x80 114 #define DCHxCSIZ 0x90 115 116 #define DMAIEC IEC1 117 #define DMAIFS IFS1 118 #define DMAINTBASE 28 119 #define DMAIPC IPC10 120 #define DCHIPCBASE 0 121 #define DCHIPCSTEP 8 122 123 /* UART conveniences. */ 124 125 #define U1MODE 0xBF806000 126 #define U2MODE 0xBF806200 127 128 #define UARTMIN 1 129 #define UARTMAX 2 130 #define UARTBASE U1MODE 131 #define UARTSTEP (U2MODE - U1MODE) 132 133 #define UxMODE 0x00 134 #define UxSTA 0x10 135 #define UxTXREG 0x20 136 #define UxRXREG 0x30 137 #define UxBRG 0x40 138 139 #define UARTIEC IEC1 140 #define UARTIFS IFS1 141 #define UARTINTBASE 7 142 #define UARTINTSTEP 14 143 #define UART1IPC IPC8 144 #define UART1IPCBASE 0 145 #define UART2IPC IPC9 146 #define UART2IPCBASE 8 147 148 /* Interrupt numbers. 149 * See... 150 * TABLE 7-1: INTERRUPT IRQ, VECTOR AND BIT LOCATION 151 * PIC32MX1XX/2XX 28/36/44-pin Family Data Sheet 152 */ 153 154 #define U1RX 40 155 #define U2RX 54 156 157 /* Address modifiers. 158 * See... 159 * 11.2 CLR, SET and INV Registers 160 * PIC32MX1XX/2XX 28/36/44-pin Family Data Sheet 161 */ 162 163 #define CLR 0x4 164 #define SET 0x8 165 #define INV 0xC 166 167 #endif /* __PIC32_H__ */