1.1 --- a/examples/vga-timer/main.c Tue Oct 23 19:01:07 2018 +0200
1.2 +++ b/examples/vga-timer/main.c Tue Oct 23 19:09:04 2018 +0200
1.3 @@ -102,7 +102,7 @@
1.4 |
1.5 Timer3 -> DMA1: linedata -> PORTB
1.6 |
1.7 - DMA1 -> DMA2: zerodata -> PORTB
1.8 + Timer3 -> DMA2: zerodata -> PORTB
1.9 */
1.10
1.11 /* Initiate DMA on the Timer2 interrupt condition, transferring line data to
1.12 @@ -125,14 +125,13 @@
1.13 dma_set_transfer(1, PHYSICAL((uint32_t) screenstart), LINE_LENGTH,
1.14 HW_PHYSICAL(PORTB), 1,
1.15 1);
1.16 - dma_init_interrupt(1, 0b00001000, 1, 3);
1.17
1.18 /* Enable DMA on the preceding channel's completion, with this also
1.19 initiating transfers. */
1.20
1.21 dma_init(2, 3);
1.22 dma_set_chaining(2, dma_chain_previous);
1.23 - dma_set_interrupt(2, DMA1, 1);
1.24 + dma_set_interrupt(2, T3, 1);
1.25 dma_set_transfer(2, PHYSICAL((uint32_t) zerodata), ZERO_LENGTH,
1.26 HW_PHYSICAL(PORTB), 1,
1.27 ZERO_LENGTH);
1.28 @@ -230,18 +229,7 @@
1.29
1.30 void visible_active(void)
1.31 {
1.32 - uint32_t ifs;
1.33 -
1.34 - /* Remove any DMA interrupt condition (CHBCIF). */
1.35 -
1.36 - ifs = REG(DMAIFS) & DMA_INT_FLAGS(1, DCHxIF);
1.37 -
1.38 - if (ifs)
1.39 - {
1.40 - CLR_REG(DMA_REG(1, DCHxINT), 0b11111111);
1.41 - CLR_REG(DMAIFS, ifs);
1.42 - INV_REG(PORTA, 1 << 2);
1.43 - }
1.44 + INV_REG(PORTA, 1 << 2);
1.45
1.46 if (line < VFP_START)
1.47 {