2018-10-20 | Paul Boddie | raw files shortlog changelog graph | Fixed the description of the interrupt configuration of OC1. | |
examples/vga/main.c (file) |
1.1 --- a/examples/vga/main.c Sat Oct 20 21:48:38 2018 +0200 1.2 +++ b/examples/vga/main.c Sat Oct 20 23:26:38 2018 +0200 1.3 @@ -123,7 +123,7 @@ 1.4 1.5 /* Configure output compare in dual compare (continuous output) mode using 1.6 Timer2 as time base. The interrupt condition drives the first DMA channel 1.7 - but is not handled (having a lower priority than the CPU). */ 1.8 + and is handled to drive the display state machine. */ 1.9 1.10 oc_init(1, 0b101, 2); 1.11 oc_set_pulse(1, HSYNC_END);