1.1 --- a/main.c Thu Oct 18 13:36:42 2018 +0200
1.2 +++ b/main.c Thu Oct 18 13:56:21 2018 +0200
1.3 @@ -64,16 +64,16 @@
1.4
1.5 init_dma();
1.6 dma_init(0, 0, 3);
1.7 - dma_set_interrupt(0, U1RX, 1);
1.8 + /* dma_set_interrupt(0, U1RX, 1); */
1.9 dma_set_transfer(0, PHYSICAL(message), sizeof(message) - 1,
1.10 HW_PHYSICAL(UART_REG(1, UxTXREG)), 1,
1.11 1);
1.12 dma_on(0);
1.13
1.14 - /* Set UART interrupt priority below CPU priority. */
1.15 + /* Set UART with interrupt. */
1.16
1.17 uart_init(1, 115200);
1.18 - uart_init_interrupt(1, UxRIF, 1, 3);
1.19 + uart_init_interrupt(1, UxRIF, 4, 3);
1.20 uart_on(1);
1.21
1.22 interrupts_on();
1.23 @@ -90,16 +90,19 @@
1.24 {
1.25 /* Check for a UART receive interrupt condition (UxRIF). */
1.26
1.27 - if (REG(UARTIFS) & UART_INT_FLAGS(1, UxRIF))
1.28 + uint32_t ifs = REG(UARTIFS) & UART_INT_FLAGS(1, UxRIF);
1.29 +
1.30 + if (ifs)
1.31 {
1.32 + /* Clear the UART interrupt condition. */
1.33 +
1.34 + CLR_REG(UARTIFS, ifs);
1.35 +
1.36 /* Write the received data back. */
1.37
1.38 while (REG(UART_REG(1, UxSTA)) & 1)
1.39 uart_write((char) REG(UART_REG(1, UxRXREG)));
1.40
1.41 - /* Clear the UART interrupt condition. */
1.42 -
1.43 - CLR_REG(UARTIFS, UART_INT_FLAGS(1, UxRIF));
1.44 INV_REG(PORTA, 1 << 2);
1.45 }
1.46 }