1.1 --- a/docs/wiki/VGA_Signal_Wiring Tue Jun 11 16:49:23 2019 +0200
1.2 +++ b/docs/wiki/VGA_Signal_Wiring Mon Apr 13 20:55:41 2020 +0200
1.3 @@ -5,6 +5,100 @@
1.4 these are certain hardware characteristics, described here to avoid
1.5 unnecessary repetition.
1.6
1.7 +== Data Signal Routing ==
1.8 +
1.9 +The following routing from output pins to output socket pins is employed.
1.10 +
1.11 +{{{#!graphviz
1.12 +//format=svg
1.13 +//transform=notugly
1.14 +digraph routing {
1.15 + graph [ranksep=1.0,style=invis,fontsize="15.0",fontname="Helvetica",splines=ortho];
1.16 + node [shape=box,style=filled,fillcolor=white,fontsize="13.0",fontname="Helvetica"];
1.17 + rankdir=LR;
1.18 +
1.19 + /* Output pins. */
1.20 +
1.21 + subgraph {
1.22 + rank=same;
1.23 + pins [label="Output pins",shape=note,fillcolor=gold];
1.24 + D6 [fillcolor=lightgrey];
1.25 + D5 [fillcolor="#ff7777"];
1.26 + D4 [fillcolor="#ff7777"];
1.27 + D3 [fillcolor="#77ff77"];
1.28 + D2 [fillcolor="#77ff77"];
1.29 + D1 [fillcolor="#7777ff"];
1.30 + D0 [fillcolor="#7777ff"];
1.31 + D7 -> D6 -> D5 -> D4 -> D3 -> D2 -> D1 -> D0 -> HSYNC -> VSYNC -> pins [style=invis];
1.32 + }
1.33 +
1.34 + /* Intensity adjustment resistor. */
1.35 +
1.36 + I2 [label="2200R"];
1.37 +
1.38 + /* Colour channel resistors and diodes. */
1.39 +
1.40 + subgraph {
1.41 + rank=same;
1.42 + R2 [label="470R",fillcolor="#ff7777"];
1.43 + R1 [label="1000R",fillcolor="#ff7777"];
1.44 + RD [label="diode",fillcolor="#ff7777"];
1.45 + R2 -> R1 -> RD [style=invis];
1.46 + }
1.47 +
1.48 + subgraph {
1.49 + rank=same;
1.50 + G2 [label="470R",fillcolor="#77ff77"];
1.51 + G1 [label="1000R",fillcolor="#77ff77"];
1.52 + GD [label="diode",fillcolor="#77ff77"];
1.53 + G2 -> G1 -> GD [style=invis];
1.54 + }
1.55 +
1.56 + subgraph {
1.57 + rank=same;
1.58 + B2 [label="470R",fillcolor="#7777ff"];
1.59 + B1 [label="1000R",fillcolor="#7777ff"];
1.60 + BD [label="diode",fillcolor="#7777ff"];
1.61 + B2 -> B1 -> BD [style=invis];
1.62 + }
1.63 +
1.64 + /* Video signals. */
1.65 +
1.66 + subgraph {
1.67 + rank=same;
1.68 + signals [label="Video signals",shape=note,fillcolor=gold];
1.69 + R [fillcolor="#ff7777"];
1.70 + G [fillcolor="#77ff77"];
1.71 + B [fillcolor="#7777ff"];
1.72 + R -> G -> B -> HS -> VS -> signals [style=invis];
1.73 + }
1.74 +
1.75 + D7 -> I2;
1.76 + D6 /* not connected */
1.77 + D5 -> R2 -> R;
1.78 + D4 -> R1 -> R;
1.79 + D3 -> G2 -> G;
1.80 + D2 -> G1 -> G;
1.81 + D1 -> B2 -> B;
1.82 + D0 -> B1 -> B;
1.83 +
1.84 + I2 -> RD;
1.85 + I2 -> GD;
1.86 + I2 -> BD;
1.87 +
1.88 + RD -> R;
1.89 + GD -> G;
1.90 + BD -> B;
1.91 +
1.92 + HSYNC -> HS;
1.93 + VSYNC -> VS;
1.94 +}
1.95 +}}}
1.96 +
1.97 +Where two bits of intensity are supported, D6 is routed via a 4700 ohm
1.98 +resistor to each of the colour channel diodes, contributing to the existing
1.99 +D7-driven intensity signal.
1.100 +
1.101 == Pinouts ==
1.102
1.103 For the examples documented in this project, the following pinouts apply. VGA