1.1 --- a/cpu.S Sat Oct 20 19:16:03 2018 +0200
1.2 +++ b/cpu.S Sat Oct 20 19:17:46 2018 +0200
1.3 @@ -136,14 +136,15 @@
1.4 .org 0x200
1.5 .set noat
1.6
1.7 -#define IRQ_STACK_LIMIT (KSEG0_BASE + 256)
1.8 +#define IRQ_STACK_LIMIT (KSEG0_BASE + IRQ_STACK_SIZE)
1.9 #define IRQ_STACK_TOP (IRQ_STACK_LIMIT - 32 * 4)
1.10
1.11 int_handler:
1.12
1.13 /* Store affected registers from IRQ_STACK_LIMIT - 4 downwards. */
1.14
1.15 - li $k0, IRQ_STACK_LIMIT
1.16 + lui $k0, %hi(IRQ_STACK_LIMIT)
1.17 + ori $k0, $k0, %lo(IRQ_STACK_LIMIT)
1.18
1.19 .irp reg, \
1.20 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 \
1.21 @@ -154,7 +155,8 @@
1.22
1.23 /* Switch to the IRQ stack. */
1.24
1.25 - li $sp, IRQ_STACK_TOP
1.26 + lui $sp, %hi(IRQ_STACK_TOP)
1.27 + ori $sp, $sp, %lo(IRQ_STACK_TOP)
1.28
1.29 jal interrupt_handler
1.30 nop
2.1 --- a/payload.ld Sat Oct 20 19:16:03 2018 +0200
2.2 +++ b/payload.ld Sat Oct 20 19:17:46 2018 +0200
2.3 @@ -1,6 +1,8 @@
2.4 OUTPUT_ARCH(mips)
2.5 ENTRY(_start)
2.6
2.7 +IRQ_STACK_SIZE = 256;
2.8 +
2.9 /* See...
2.10 * FIGURE 4-5: MEMORY MAP ON RESET FOR PIC32MX170/270 DEVICES (64 KB RAM, 256 KB FLASH)
2.11 * PIC32MX1XX/2XX 28/36/44-pin Family Data Sheet
2.12 @@ -8,11 +10,12 @@
2.13
2.14 MEMORY
2.15 {
2.16 - kseg1_data_mem (w!x) : ORIGIN = 0xA0000000, LENGTH = 0x10000
2.17 kseg0_boot_mem (rx) : ORIGIN = 0x9FC00000, LENGTH = 0xBF0
2.18 kseg0_program_mem (rx) : ORIGIN = 0x9D000000, LENGTH = 0x40000
2.19 + kseg0_data_mem (w!x) : ORIGIN = 0x80000000, LENGTH = 0x10000
2.20 physical_boot_mem (rx) : ORIGIN = 0x1FC00000, LENGTH = 0xBF0
2.21 physical_program_mem (rx) : ORIGIN = 0x1D000000, LENGTH = 0x40000
2.22 + physical_data_mem (w!x) : ORIGIN = 0x00000000, LENGTH = 0x10000
2.23 sfrs : ORIGIN = 0xBF800000, LENGTH = 0x100000
2.24 configsfrs : ORIGIN = 0xBFC00BF0, LENGTH = 0x10
2.25 config3 : ORIGIN = 0xBFC00BF0, LENGTH = 0x4
2.26 @@ -27,17 +30,41 @@
2.27
2.28 SECTIONS
2.29 {
2.30 + /* Boot program. */
2.31 +
2.32 .boot : { *(.boot*) } > kseg0_boot_mem AT > physical_boot_mem
2.33 +
2.34 + /* Exception/interrupt vectors and general program code. */
2.35 +
2.36 .vectors : { *(.vectors*) } > kseg0_program_mem AT > physical_program_mem
2.37 .text : { *(.text*) } > kseg0_program_mem AT > physical_program_mem
2.38 - .bss : { *(.bss*) } > kseg1_data_mem
2.39 +
2.40 + /* Reserve space at the bottom of RAM for the IRQ stack. */
2.41 +
2.42 + .irqstack : {
2.43 + . += IRQ_STACK_SIZE;
2.44 + } > kseg0_data_mem AT > physical_data_mem
2.45 +
2.46 + /* Add other data after the IRQ stack. */
2.47 +
2.48 + .bss : { *(.bss*) } > kseg0_data_mem AT > physical_data_mem
2.49 + .data : { *(.data*) } > kseg0_data_mem AT > physical_data_mem
2.50 +
2.51 + /* Store constant data in program memory. */
2.52 +
2.53 .rodata : { *(.rodata*) } > kseg0_program_mem AT > physical_program_mem
2.54 .got : {
2.55 _gp = ALIGN(16);
2.56 *(.got*)
2.57 } > kseg0_program_mem AT > physical_program_mem
2.58 +
2.59 + /* Device configuration registers to be flashed. */
2.60 +
2.61 .devcfg0 : { *(.devcfg0) } > config0 AT > physical_config0
2.62 .devcfg1 : { *(.devcfg1) } > config1 AT > physical_config1
2.63 .devcfg2 : { *(.devcfg2) } > config2 AT > physical_config2
2.64 - /DISCARD/ : { *(.reginfo) *(.MIPS.abiflags) }
2.65 +
2.66 + /* Discard things that might overwrite useful data. */
2.67 +
2.68 + /DISCARD/ : { *(.reginfo) *(.MIPS.abiflags) *(.pdr) *(.gnu.attributes) *(.comment) }
2.69 }