paul@218 | 1 | /* |
paul@218 | 2 | * Access various peripherals on a board using the JZ4780. |
paul@218 | 3 | * |
paul@258 | 4 | * Copyright (C) 2023, 2024 Paul Boddie <paul@boddie.org.uk> |
paul@218 | 5 | * |
paul@218 | 6 | * This program is free software; you can redistribute it and/or |
paul@218 | 7 | * modify it under the terms of the GNU General Public License as |
paul@218 | 8 | * published by the Free Software Foundation; either version 2 of |
paul@218 | 9 | * the License, or (at your option) any later version. |
paul@218 | 10 | * |
paul@218 | 11 | * This program is distributed in the hope that it will be useful, |
paul@218 | 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
paul@218 | 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
paul@218 | 14 | * GNU General Public License for more details. |
paul@218 | 15 | * |
paul@218 | 16 | * You should have received a copy of the GNU General Public License |
paul@218 | 17 | * along with this program; if not, write to the Free Software |
paul@218 | 18 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, |
paul@218 | 19 | * Boston, MA 02110-1301, USA |
paul@218 | 20 | */ |
paul@218 | 21 | |
paul@221 | 22 | /* NOTE: AIC support should be replaced. The CI20 should be able to send I2S |
paul@221 | 23 | audio over HDMI or via its internal codec to the headphone socket. */ |
paul@221 | 24 | |
paul@221 | 25 | #include <l4/devices/aic-x1600.h> |
paul@221 | 26 | |
paul@218 | 27 | #include <l4/devices/cpm-jz4780.h> |
paul@218 | 28 | #include <l4/devices/dma-jz4780.h> |
paul@218 | 29 | #include <l4/devices/gpio-jz4780.h> |
paul@218 | 30 | #include <l4/devices/i2c-jz4780.h> |
paul@258 | 31 | #include <l4/devices/msc-jz4780.h> |
paul@221 | 32 | |
paul@237 | 33 | /* The X1600 RTC functionality is a subset of that in the JZ4780. */ |
paul@237 | 34 | |
paul@237 | 35 | #include <l4/devices/rtc-x1600.h> |
paul@237 | 36 | |
paul@222 | 37 | /* GPIO-based SPI can use arbitrary pins, whereas on the CI20 only the secondary |
paul@222 | 38 | header provides pins like GPC. */ |
paul@221 | 39 | |
paul@218 | 40 | #include <l4/devices/spi-gpio.h> |
paul@222 | 41 | #include <l4/devices/spi-hybrid.h> |
paul@221 | 42 | #include <l4/devices/spi-jz4780.h> |
paul@253 | 43 | #include <l4/devices/tcu-jz4780.h> |
paul@218 | 44 | #include "common.h" |
paul@218 | 45 | |
paul@218 | 46 | |
paul@218 | 47 | |
paul@218 | 48 | /* AIC adapter functions. */ |
paul@218 | 49 | |
paul@218 | 50 | void *aic_init(l4_addr_t aic_start, l4_addr_t start, l4_addr_t end, void *cpm) |
paul@218 | 51 | { |
paul@218 | 52 | return x1600_aic_init(aic_start, start, end, cpm); |
paul@218 | 53 | } |
paul@218 | 54 | |
paul@218 | 55 | void *aic_get_channel(void *aic, int num, void *channel) |
paul@218 | 56 | { |
paul@218 | 57 | return x1600_aic_get_channel(aic, num, channel); |
paul@218 | 58 | } |
paul@218 | 59 | |
paul@221 | 60 | unsigned int aic_transfer(void *channel, l4re_dma_space_dma_addr_t paddr, |
paul@221 | 61 | uint32_t count, uint32_t sample_rate, |
paul@221 | 62 | uint8_t sample_size) |
paul@218 | 63 | { |
paul@221 | 64 | return x1600_aic_transfer(channel, paddr, count, sample_rate, sample_size); |
paul@218 | 65 | } |
paul@218 | 66 | |
paul@218 | 67 | |
paul@218 | 68 | |
paul@218 | 69 | /* CPM adapter functions. */ |
paul@218 | 70 | |
paul@218 | 71 | void *cpm_init(l4_addr_t cpm_base) |
paul@218 | 72 | { |
paul@218 | 73 | return jz4780_cpm_init(cpm_base); |
paul@218 | 74 | } |
paul@218 | 75 | |
paul@218 | 76 | const char *cpm_clock_type(void *cpm, enum Clock_identifiers clock) |
paul@218 | 77 | { |
paul@218 | 78 | return jz4780_cpm_clock_type(cpm, clock); |
paul@218 | 79 | } |
paul@218 | 80 | |
paul@218 | 81 | int cpm_have_clock(void *cpm, enum Clock_identifiers clock) |
paul@218 | 82 | { |
paul@218 | 83 | return jz4780_cpm_have_clock(cpm, clock); |
paul@218 | 84 | } |
paul@218 | 85 | |
paul@218 | 86 | void cpm_start_clock(void *cpm, enum Clock_identifiers clock) |
paul@218 | 87 | { |
paul@218 | 88 | jz4780_cpm_start_clock(cpm, clock); |
paul@218 | 89 | } |
paul@218 | 90 | |
paul@218 | 91 | void cpm_stop_clock(void *cpm, enum Clock_identifiers clock) |
paul@218 | 92 | { |
paul@218 | 93 | jz4780_cpm_stop_clock(cpm, clock); |
paul@218 | 94 | } |
paul@218 | 95 | |
paul@218 | 96 | int cpm_get_parameters(void *cpm, enum Clock_identifiers clock, |
paul@218 | 97 | uint32_t parameters[]) |
paul@218 | 98 | { |
paul@218 | 99 | return jz4780_cpm_get_parameters(cpm, clock, parameters); |
paul@218 | 100 | } |
paul@218 | 101 | |
paul@218 | 102 | int cpm_set_parameters(void *cpm, enum Clock_identifiers clock, |
paul@218 | 103 | int num_parameters, uint32_t parameters[]) |
paul@218 | 104 | { |
paul@218 | 105 | return jz4780_cpm_set_parameters(cpm, clock, num_parameters, parameters); |
paul@218 | 106 | } |
paul@218 | 107 | |
paul@218 | 108 | uint8_t cpm_get_source(void *cpm, enum Clock_identifiers clock) |
paul@218 | 109 | { |
paul@218 | 110 | return jz4780_cpm_get_source(cpm, clock); |
paul@218 | 111 | } |
paul@218 | 112 | |
paul@218 | 113 | void cpm_set_source(void *cpm, enum Clock_identifiers clock, uint8_t source) |
paul@218 | 114 | { |
paul@218 | 115 | jz4780_cpm_set_source(cpm, clock, source); |
paul@218 | 116 | } |
paul@218 | 117 | |
paul@218 | 118 | enum Clock_identifiers cpm_get_source_clock(void *cpm, enum Clock_identifiers clock) |
paul@218 | 119 | { |
paul@218 | 120 | return jz4780_cpm_get_source_clock(cpm, clock); |
paul@218 | 121 | } |
paul@218 | 122 | |
paul@218 | 123 | void cpm_set_source_clock(void *cpm, enum Clock_identifiers clock, enum Clock_identifiers source) |
paul@218 | 124 | { |
paul@218 | 125 | jz4780_cpm_set_source_clock(cpm, clock, source); |
paul@218 | 126 | } |
paul@218 | 127 | |
paul@218 | 128 | uint64_t cpm_get_source_frequency(void *cpm, enum Clock_identifiers clock) |
paul@218 | 129 | { |
paul@218 | 130 | return jz4780_cpm_get_source_frequency(cpm, clock); |
paul@218 | 131 | } |
paul@218 | 132 | |
paul@218 | 133 | uint64_t cpm_get_frequency(void *cpm, enum Clock_identifiers clock) |
paul@218 | 134 | { |
paul@218 | 135 | return jz4780_cpm_get_frequency(cpm, clock); |
paul@218 | 136 | } |
paul@218 | 137 | |
paul@218 | 138 | int cpm_set_frequency(void *cpm, enum Clock_identifiers clock, uint64_t frequency) |
paul@218 | 139 | { |
paul@218 | 140 | return jz4780_cpm_set_frequency(cpm, clock, frequency); |
paul@218 | 141 | } |
paul@218 | 142 | |
paul@218 | 143 | |
paul@218 | 144 | |
paul@218 | 145 | /* DMA adapter functions. */ |
paul@218 | 146 | |
paul@218 | 147 | void *dma_init(l4_addr_t start, l4_addr_t end, void *cpm) |
paul@218 | 148 | { |
paul@218 | 149 | return jz4780_dma_init(start, end, cpm); |
paul@218 | 150 | } |
paul@218 | 151 | |
paul@218 | 152 | void dma_disable(void *dma_chip) |
paul@218 | 153 | { |
paul@218 | 154 | jz4780_dma_disable(dma_chip); |
paul@218 | 155 | } |
paul@218 | 156 | |
paul@218 | 157 | void dma_enable(void *dma_chip) |
paul@218 | 158 | { |
paul@218 | 159 | jz4780_dma_enable(dma_chip); |
paul@218 | 160 | } |
paul@218 | 161 | |
paul@218 | 162 | void *dma_get_channel(void *dma, uint8_t channel, l4_cap_idx_t irq) |
paul@218 | 163 | { |
paul@218 | 164 | return jz4780_dma_get_channel(dma, channel, irq); |
paul@218 | 165 | } |
paul@218 | 166 | |
paul@218 | 167 | unsigned int dma_transfer(void *dma_channel, |
paul@218 | 168 | uint32_t source, uint32_t destination, |
paul@218 | 169 | unsigned int count, |
paul@218 | 170 | int source_increment, int destination_increment, |
paul@218 | 171 | uint8_t source_width, uint8_t destination_width, |
paul@218 | 172 | uint8_t transfer_unit_size, |
paul@218 | 173 | int type) |
paul@218 | 174 | { |
paul@218 | 175 | return jz4780_dma_transfer(dma_channel, source, destination, count, |
paul@218 | 176 | source_increment, destination_increment, |
paul@218 | 177 | source_width, destination_width, |
paul@218 | 178 | transfer_unit_size, type); |
paul@218 | 179 | } |
paul@218 | 180 | |
paul@218 | 181 | unsigned int dma_wait(void *dma_channel) |
paul@218 | 182 | { |
paul@218 | 183 | return jz4780_dma_wait(dma_channel); |
paul@218 | 184 | } |
paul@218 | 185 | |
paul@218 | 186 | |
paul@218 | 187 | |
paul@218 | 188 | /* GPIO adapter functions. */ |
paul@218 | 189 | |
paul@218 | 190 | void *gpio_init(l4_addr_t start, l4_addr_t end, unsigned pins, |
paul@218 | 191 | l4_uint32_t pull_ups, l4_uint32_t pull_downs) |
paul@218 | 192 | { |
paul@218 | 193 | return jz4780_gpio_init(start, end, pins, pull_ups, pull_downs); |
paul@218 | 194 | } |
paul@218 | 195 | |
paul@218 | 196 | void gpio_setup(void *gpio, unsigned pin, unsigned mode, int value) |
paul@218 | 197 | { |
paul@218 | 198 | jz4780_gpio_setup(gpio, pin, mode, value); |
paul@218 | 199 | } |
paul@218 | 200 | |
paul@218 | 201 | void gpio_config_pull(void *gpio, unsigned pin, unsigned mode) |
paul@218 | 202 | { |
paul@218 | 203 | jz4780_gpio_config_pull(gpio, pin, mode); |
paul@218 | 204 | } |
paul@218 | 205 | |
paul@218 | 206 | void gpio_config_pad(void *gpio, unsigned pin, unsigned func, unsigned value) |
paul@218 | 207 | { |
paul@218 | 208 | jz4780_gpio_config_pad(gpio, pin, func, value); |
paul@218 | 209 | } |
paul@218 | 210 | |
paul@218 | 211 | void gpio_config_get(void *gpio, unsigned pin, unsigned reg, unsigned *value) |
paul@218 | 212 | { |
paul@218 | 213 | jz4780_gpio_config_get(gpio, pin, reg, value); |
paul@218 | 214 | } |
paul@218 | 215 | |
paul@218 | 216 | void gpio_config_pad_get(void *gpio, unsigned pin, unsigned *func, unsigned *value) |
paul@218 | 217 | { |
paul@218 | 218 | jz4780_gpio_config_pad_get(gpio, pin, func, value); |
paul@218 | 219 | } |
paul@218 | 220 | |
paul@218 | 221 | void gpio_multi_setup(void *gpio, Pin_slice const *mask, unsigned mode, unsigned outvalues) |
paul@218 | 222 | { |
paul@218 | 223 | jz4780_gpio_multi_setup(gpio, mask, mode, outvalues); |
paul@218 | 224 | } |
paul@218 | 225 | |
paul@218 | 226 | void gpio_multi_config_pad(void *gpio, Pin_slice const *mask, unsigned func, unsigned value) |
paul@218 | 227 | { |
paul@218 | 228 | jz4780_gpio_multi_config_pad(gpio, mask, func, value); |
paul@218 | 229 | } |
paul@218 | 230 | |
paul@218 | 231 | void gpio_multi_set(void *gpio, Pin_slice const *mask, unsigned data) |
paul@218 | 232 | { |
paul@218 | 233 | jz4780_gpio_multi_set(gpio, mask, data); |
paul@218 | 234 | } |
paul@218 | 235 | |
paul@218 | 236 | unsigned gpio_multi_get(void *gpio, unsigned offset) |
paul@218 | 237 | { |
paul@218 | 238 | return jz4780_gpio_multi_get(gpio, offset); |
paul@218 | 239 | } |
paul@218 | 240 | |
paul@218 | 241 | int gpio_get(void *gpio, unsigned pin) |
paul@218 | 242 | { |
paul@218 | 243 | return jz4780_gpio_get(gpio, pin); |
paul@218 | 244 | } |
paul@218 | 245 | |
paul@218 | 246 | void gpio_set(void *gpio, unsigned pin, int value) |
paul@218 | 247 | { |
paul@218 | 248 | jz4780_gpio_set(gpio, pin, value); |
paul@218 | 249 | } |
paul@218 | 250 | |
paul@218 | 251 | void *gpio_get_irq(void *gpio, unsigned pin) |
paul@218 | 252 | { |
paul@218 | 253 | return jz4780_gpio_get_irq(gpio, pin); |
paul@218 | 254 | } |
paul@218 | 255 | |
paul@218 | 256 | bool gpio_irq_set_mode(void *gpio_irq, unsigned mode) |
paul@218 | 257 | { |
paul@218 | 258 | return jz4780_gpio_irq_set_mode(gpio_irq, mode); |
paul@218 | 259 | } |
paul@218 | 260 | |
paul@218 | 261 | |
paul@218 | 262 | |
paul@218 | 263 | /* I2C adapter functions. */ |
paul@218 | 264 | |
paul@218 | 265 | void *i2c_init(l4_addr_t start, l4_addr_t end, void *cpm, |
paul@218 | 266 | uint32_t frequency) |
paul@218 | 267 | { |
paul@218 | 268 | return jz4780_i2c_init(start, end, cpm, frequency); |
paul@218 | 269 | } |
paul@218 | 270 | |
paul@218 | 271 | void *i2c_get_channel(void *i2c, uint8_t channel) |
paul@218 | 272 | { |
paul@218 | 273 | return jz4780_i2c_get_channel(i2c, channel); |
paul@218 | 274 | } |
paul@218 | 275 | |
paul@218 | 276 | uint32_t i2c_get_frequency(void *i2c_channel) |
paul@218 | 277 | { |
paul@218 | 278 | return jz4780_i2c_get_frequency(i2c_channel); |
paul@218 | 279 | } |
paul@218 | 280 | |
paul@218 | 281 | void i2c_set_target(void *i2c_channel, uint8_t addr) |
paul@218 | 282 | { |
paul@218 | 283 | return jz4780_i2c_set_target(i2c_channel, addr); |
paul@218 | 284 | } |
paul@218 | 285 | |
paul@218 | 286 | void i2c_start_read(void *i2c_channel, uint8_t buf[], unsigned int total, |
paul@218 | 287 | int stop) |
paul@218 | 288 | { |
paul@218 | 289 | jz4780_i2c_start_read(i2c_channel, buf, total, stop); |
paul@218 | 290 | } |
paul@218 | 291 | |
paul@218 | 292 | void i2c_read(void *i2c_channel) |
paul@218 | 293 | { |
paul@218 | 294 | jz4780_i2c_read(i2c_channel); |
paul@218 | 295 | } |
paul@218 | 296 | |
paul@218 | 297 | void i2c_start_write(void *i2c_channel, uint8_t buf[], unsigned int total, |
paul@218 | 298 | int stop) |
paul@218 | 299 | { |
paul@218 | 300 | jz4780_i2c_start_write(i2c_channel, buf, total, stop); |
paul@218 | 301 | } |
paul@218 | 302 | |
paul@218 | 303 | void i2c_write(void *i2c_channel) |
paul@218 | 304 | { |
paul@218 | 305 | jz4780_i2c_write(i2c_channel); |
paul@218 | 306 | } |
paul@218 | 307 | |
paul@218 | 308 | int i2c_read_done(void *i2c_channel) |
paul@218 | 309 | { |
paul@218 | 310 | return jz4780_i2c_read_done(i2c_channel); |
paul@218 | 311 | } |
paul@218 | 312 | |
paul@218 | 313 | int i2c_write_done(void *i2c_channel) |
paul@218 | 314 | { |
paul@218 | 315 | return jz4780_i2c_write_done(i2c_channel); |
paul@218 | 316 | } |
paul@218 | 317 | |
paul@218 | 318 | unsigned int i2c_have_read(void *i2c_channel) |
paul@218 | 319 | { |
paul@218 | 320 | return jz4780_i2c_have_read(i2c_channel); |
paul@218 | 321 | } |
paul@218 | 322 | |
paul@218 | 323 | unsigned int i2c_have_written(void *i2c_channel) |
paul@218 | 324 | { |
paul@218 | 325 | return jz4780_i2c_have_written(i2c_channel); |
paul@218 | 326 | } |
paul@218 | 327 | |
paul@218 | 328 | int i2c_failed(void *i2c_channel) |
paul@218 | 329 | { |
paul@218 | 330 | return jz4780_i2c_failed(i2c_channel); |
paul@218 | 331 | } |
paul@218 | 332 | |
paul@218 | 333 | void i2c_stop(void *i2c_channel) |
paul@218 | 334 | { |
paul@218 | 335 | jz4780_i2c_stop(i2c_channel); |
paul@218 | 336 | } |
paul@218 | 337 | |
paul@218 | 338 | |
paul@218 | 339 | |
paul@258 | 340 | /* MSC adapter functions. */ |
paul@258 | 341 | |
paul@258 | 342 | void *msc_init(l4_addr_t msc_start, l4_addr_t start, l4_addr_t end) |
paul@258 | 343 | { |
paul@258 | 344 | return jz4780_msc_init(msc_start, start, end); |
paul@258 | 345 | } |
paul@258 | 346 | |
paul@258 | 347 | void *msc_get_channel(void *msc, uint8_t channel, l4_cap_idx_t irq, void *dma) |
paul@258 | 348 | { |
paul@258 | 349 | return jz4780_msc_get_channel(msc, channel, irq, dma); |
paul@258 | 350 | } |
paul@258 | 351 | |
paul@263 | 352 | struct msc_card *msc_get_cards(void *msc_channel) |
paul@258 | 353 | { |
paul@263 | 354 | return jz4780_msc_get_cards(msc_channel); |
paul@263 | 355 | } |
paul@263 | 356 | |
paul@263 | 357 | uint8_t msc_num_cards(void *msc_channel) |
paul@263 | 358 | { |
paul@263 | 359 | return jz4780_msc_num_cards(msc_channel); |
paul@258 | 360 | } |
paul@258 | 361 | |
paul@258 | 362 | void msc_enable(void *msc_channel) |
paul@258 | 363 | { |
paul@258 | 364 | jz4780_msc_enable(msc_channel); |
paul@258 | 365 | } |
paul@258 | 366 | |
paul@261 | 367 | uint32_t msc_read_blocks(void *msc_channel, uint8_t card, |
paul@261 | 368 | l4re_dma_space_dma_addr_t paddr, |
paul@261 | 369 | uint32_t block_address, uint32_t block_count) |
paul@258 | 370 | { |
paul@261 | 371 | return jz4780_msc_read_blocks(msc_channel, card, paddr, block_address, |
paul@261 | 372 | block_count); |
paul@258 | 373 | } |
paul@258 | 374 | |
paul@258 | 375 | |
paul@258 | 376 | |
paul@237 | 377 | /* RTC adapter functions. */ |
paul@237 | 378 | |
paul@240 | 379 | void *rtc_init(l4_addr_t start, void *cpm) |
paul@237 | 380 | { |
paul@240 | 381 | /* Ignore the CPM requirement for the JZ4780. */ |
paul@240 | 382 | |
paul@240 | 383 | (void) cpm; |
paul@240 | 384 | return x1600_rtc_init(start, NULL); |
paul@237 | 385 | } |
paul@237 | 386 | |
paul@237 | 387 | void rtc_disable(void *rtc) |
paul@237 | 388 | { |
paul@237 | 389 | x1600_rtc_disable(rtc); |
paul@237 | 390 | } |
paul@237 | 391 | |
paul@237 | 392 | void rtc_enable(void *rtc) |
paul@237 | 393 | { |
paul@237 | 394 | x1600_rtc_enable(rtc); |
paul@237 | 395 | } |
paul@237 | 396 | |
paul@239 | 397 | void rtc_alarm_disable(void *rtc) |
paul@239 | 398 | { |
paul@239 | 399 | x1600_rtc_alarm_disable(rtc); |
paul@239 | 400 | } |
paul@239 | 401 | |
paul@239 | 402 | void rtc_alarm_enable(void *rtc) |
paul@239 | 403 | { |
paul@239 | 404 | x1600_rtc_alarm_enable(rtc); |
paul@239 | 405 | } |
paul@239 | 406 | |
paul@237 | 407 | uint32_t rtc_get_seconds(void *rtc) |
paul@237 | 408 | { |
paul@237 | 409 | return x1600_rtc_get_seconds(rtc); |
paul@237 | 410 | } |
paul@237 | 411 | |
paul@237 | 412 | void rtc_set_seconds(void *rtc, uint32_t seconds) |
paul@237 | 413 | { |
paul@237 | 414 | x1600_rtc_set_seconds(rtc, seconds); |
paul@237 | 415 | } |
paul@237 | 416 | |
paul@237 | 417 | uint32_t rtc_get_alarm_seconds(void *rtc) |
paul@237 | 418 | { |
paul@237 | 419 | return x1600_rtc_get_alarm_seconds(rtc); |
paul@237 | 420 | } |
paul@237 | 421 | |
paul@237 | 422 | void rtc_set_alarm_seconds(void *rtc, uint32_t seconds) |
paul@237 | 423 | { |
paul@237 | 424 | x1600_rtc_set_alarm_seconds(rtc, seconds); |
paul@237 | 425 | } |
paul@237 | 426 | |
paul@238 | 427 | void rtc_hibernate(void *rtc) |
paul@238 | 428 | { |
paul@238 | 429 | x1600_rtc_hibernate(rtc); |
paul@238 | 430 | } |
paul@238 | 431 | |
paul@237 | 432 | void rtc_power_down(void *rtc) |
paul@237 | 433 | { |
paul@237 | 434 | x1600_rtc_power_down(rtc); |
paul@237 | 435 | } |
paul@237 | 436 | |
paul@237 | 437 | void rtc_set_regulator(void *rtc, uint32_t base, uint32_t adjustment) |
paul@237 | 438 | { |
paul@237 | 439 | x1600_rtc_set_regulator(rtc, base, adjustment); |
paul@237 | 440 | } |
paul@237 | 441 | |
paul@237 | 442 | |
paul@237 | 443 | |
paul@218 | 444 | /* SPI adapter functions. */ |
paul@218 | 445 | |
paul@221 | 446 | void *spi_init(l4_addr_t spi_start, l4_addr_t start, l4_addr_t end, void *cpm) |
paul@218 | 447 | { |
paul@221 | 448 | return jz4780_spi_init(spi_start, start, end, cpm); |
paul@221 | 449 | } |
paul@221 | 450 | |
paul@222 | 451 | void *spi_get_channel(void *spi, uint8_t num, void *channel, uint64_t frequency, |
paul@222 | 452 | void *control_chip, int control_pin, int control_alt_func) |
paul@221 | 453 | { |
paul@222 | 454 | void *ch = jz4780_spi_get_channel(spi, num, channel, frequency); |
paul@222 | 455 | |
paul@222 | 456 | return spi_hybrid_get_channel(ch, control_chip, control_pin, control_alt_func); |
paul@218 | 457 | } |
paul@218 | 458 | |
paul@222 | 459 | void *spi_get_channel_gpio(uint64_t frequency, |
paul@222 | 460 | void *clock_chip, int clock_pin, |
paul@221 | 461 | void *data_chip, int data_pin, |
paul@221 | 462 | void *enable_chip, int enable_pin, |
paul@222 | 463 | void *control_chip, int control_pin) |
paul@221 | 464 | { |
paul@235 | 465 | void *ch = spi_gpio_get_channel(frequency, clock_chip, clock_pin, data_chip, |
paul@235 | 466 | data_pin, enable_chip, enable_pin, control_chip, |
paul@235 | 467 | control_pin); |
paul@235 | 468 | |
paul@235 | 469 | return spi_hybrid_get_channel(ch, control_chip, control_pin, -1); |
paul@222 | 470 | } |
paul@222 | 471 | |
paul@222 | 472 | void spi_acquire_control(void *channel, int level) |
paul@222 | 473 | { |
paul@222 | 474 | spi_hybrid_acquire_control(channel, level); |
paul@221 | 475 | } |
paul@221 | 476 | |
paul@222 | 477 | void spi_release_control(void *channel) |
paul@221 | 478 | { |
paul@222 | 479 | spi_hybrid_release_control(channel); |
paul@221 | 480 | } |
paul@221 | 481 | |
paul@235 | 482 | void spi_send(void *channel, uint32_t bytes, const uint8_t data[]) |
paul@218 | 483 | { |
paul@235 | 484 | spi_hybrid_send(channel, bytes, data); |
paul@218 | 485 | } |
paul@218 | 486 | |
paul@222 | 487 | void spi_send_units(void *channel, uint32_t bytes, const uint8_t data[], |
paul@236 | 488 | uint8_t unit_size, uint8_t char_size, int big_endian) |
paul@222 | 489 | { |
paul@236 | 490 | spi_hybrid_send_units(channel, bytes, data, unit_size, char_size, big_endian); |
paul@222 | 491 | } |
paul@222 | 492 | |
paul@236 | 493 | uint32_t spi_transfer(void *channel, l4_addr_t vaddr, |
paul@236 | 494 | l4re_dma_space_dma_addr_t paddr, uint32_t count, |
paul@236 | 495 | uint8_t unit_size, uint8_t char_size, |
paul@223 | 496 | l4_addr_t desc_vaddr, l4re_dma_space_dma_addr_t desc_paddr) |
paul@221 | 497 | { |
paul@236 | 498 | return spi_hybrid_transfer_descriptor(channel, vaddr, paddr, count, unit_size, |
paul@236 | 499 | char_size, desc_vaddr, desc_paddr); |
paul@221 | 500 | } |
paul@221 | 501 | |
paul@218 | 502 | |
paul@218 | 503 | |
paul@253 | 504 | /* TCU adapter functions. */ |
paul@253 | 505 | |
paul@253 | 506 | void *tcu_init(l4_addr_t start, l4_addr_t end) |
paul@253 | 507 | { |
paul@253 | 508 | return jz4780_tcu_init(start, end); |
paul@253 | 509 | } |
paul@253 | 510 | |
paul@253 | 511 | void *tcu_get_channel(void *tcu, uint8_t channel, l4_cap_idx_t irq) |
paul@253 | 512 | { |
paul@253 | 513 | return jz4780_tcu_get_channel(tcu, channel, irq); |
paul@253 | 514 | } |
paul@253 | 515 | |
paul@253 | 516 | void tcu_disable(void *tcu_channel) |
paul@253 | 517 | { |
paul@253 | 518 | jz4780_tcu_disable(tcu_channel); |
paul@253 | 519 | } |
paul@253 | 520 | |
paul@253 | 521 | void tcu_enable(void *tcu_channel) |
paul@253 | 522 | { |
paul@253 | 523 | jz4780_tcu_enable(tcu_channel); |
paul@253 | 524 | } |
paul@253 | 525 | |
paul@253 | 526 | int tcu_is_enabled(void *tcu_channel) |
paul@253 | 527 | { |
paul@253 | 528 | return jz4780_tcu_is_enabled(tcu_channel); |
paul@253 | 529 | } |
paul@253 | 530 | |
paul@253 | 531 | uint8_t tcu_get_clock(void *tcu_channel) |
paul@253 | 532 | { |
paul@253 | 533 | return jz4780_tcu_get_clock(tcu_channel); |
paul@253 | 534 | } |
paul@253 | 535 | |
paul@253 | 536 | void tcu_set_clock(void *tcu_channel, uint8_t clock) |
paul@253 | 537 | { |
paul@253 | 538 | jz4780_tcu_set_clock(tcu_channel, clock); |
paul@253 | 539 | } |
paul@253 | 540 | |
paul@253 | 541 | uint32_t tcu_get_prescale(void *tcu_channel) |
paul@253 | 542 | { |
paul@253 | 543 | return jz4780_tcu_get_prescale(tcu_channel); |
paul@253 | 544 | } |
paul@253 | 545 | |
paul@253 | 546 | void tcu_set_prescale(void *tcu_channel, uint32_t prescale) |
paul@253 | 547 | { |
paul@253 | 548 | jz4780_tcu_set_prescale(tcu_channel, prescale); |
paul@253 | 549 | } |
paul@253 | 550 | |
paul@253 | 551 | uint32_t tcu_get_counter(void *tcu_channel) |
paul@253 | 552 | { |
paul@253 | 553 | return jz4780_tcu_get_counter(tcu_channel); |
paul@253 | 554 | } |
paul@253 | 555 | |
paul@253 | 556 | void tcu_set_counter(void *tcu_channel, uint32_t value) |
paul@253 | 557 | { |
paul@253 | 558 | jz4780_tcu_set_counter(tcu_channel, value); |
paul@253 | 559 | } |
paul@253 | 560 | |
paul@253 | 561 | uint8_t tcu_get_count_mode(void *tcu_channel) |
paul@253 | 562 | { |
paul@253 | 563 | return jz4780_tcu_get_count_mode(tcu_channel); |
paul@253 | 564 | } |
paul@253 | 565 | |
paul@253 | 566 | void tcu_set_count_mode(void *tcu_channel, uint8_t mode) |
paul@253 | 567 | { |
paul@253 | 568 | jz4780_tcu_set_count_mode(tcu_channel, mode); |
paul@253 | 569 | } |
paul@253 | 570 | |
paul@253 | 571 | uint32_t tcu_get_full_data_value(void *tcu_channel) |
paul@253 | 572 | { |
paul@253 | 573 | return jz4780_tcu_get_full_data_value(tcu_channel); |
paul@253 | 574 | } |
paul@253 | 575 | |
paul@253 | 576 | void tcu_set_full_data_value(void *tcu_channel, uint32_t value) |
paul@253 | 577 | { |
paul@253 | 578 | jz4780_tcu_set_full_data_value(tcu_channel, value); |
paul@253 | 579 | } |
paul@253 | 580 | |
paul@253 | 581 | uint32_t tcu_get_half_data_value(void *tcu_channel) |
paul@253 | 582 | { |
paul@253 | 583 | return jz4780_tcu_get_half_data_value(tcu_channel); |
paul@253 | 584 | } |
paul@253 | 585 | |
paul@253 | 586 | void tcu_set_half_data_value(void *tcu_channel, uint32_t value) |
paul@253 | 587 | { |
paul@253 | 588 | jz4780_tcu_set_half_data_value(tcu_channel, value); |
paul@253 | 589 | } |
paul@253 | 590 | |
paul@253 | 591 | int tcu_get_full_data_mask(void *tcu_channel) |
paul@253 | 592 | { |
paul@253 | 593 | return jz4780_tcu_get_full_data_mask(tcu_channel); |
paul@253 | 594 | } |
paul@253 | 595 | |
paul@253 | 596 | void tcu_set_full_data_mask(void *tcu_channel, int masked) |
paul@253 | 597 | { |
paul@253 | 598 | jz4780_tcu_set_full_data_mask(tcu_channel, masked); |
paul@253 | 599 | } |
paul@253 | 600 | |
paul@253 | 601 | int tcu_get_half_data_mask(void *tcu_channel) |
paul@253 | 602 | { |
paul@253 | 603 | return jz4780_tcu_get_half_data_mask(tcu_channel); |
paul@253 | 604 | } |
paul@253 | 605 | |
paul@253 | 606 | void tcu_set_half_data_mask(void *tcu_channel, int masked) |
paul@253 | 607 | { |
paul@253 | 608 | jz4780_tcu_set_half_data_mask(tcu_channel, masked); |
paul@253 | 609 | } |
paul@253 | 610 | |
paul@253 | 611 | int tcu_have_interrupt(void *tcu_channel) |
paul@253 | 612 | { |
paul@253 | 613 | return jz4780_tcu_have_interrupt(tcu_channel); |
paul@253 | 614 | } |
paul@253 | 615 | |
paul@253 | 616 | int tcu_wait_for_irq(void *tcu_channel, uint32_t timeout) |
paul@253 | 617 | { |
paul@253 | 618 | return jz4780_tcu_wait_for_irq(tcu_channel, timeout); |
paul@253 | 619 | } |
paul@253 | 620 | |
paul@253 | 621 | |
paul@253 | 622 | |
paul@218 | 623 | /* Memory regions. */ |
paul@218 | 624 | |
paul@236 | 625 | const char *io_memory_regions[] = { |
paul@218 | 626 | [AIC] = "jz4780-aic", |
paul@218 | 627 | [CPM] = "jz4780-cpm", |
paul@218 | 628 | [DMA] = "jz4780-dma", |
paul@218 | 629 | [GPIO] = "jz4780-gpio", |
paul@218 | 630 | [I2C] = "jz4780-i2c", |
paul@258 | 631 | [MSC] = "jz4780-msc", |
paul@237 | 632 | [RTC] = "jz4780-rtc", |
paul@221 | 633 | [SSI] = "jz4780-ssi", |
paul@253 | 634 | [TCU] = "jz4780-tcu", |
paul@218 | 635 | }; |
paul@218 | 636 | |
paul@218 | 637 | |
paul@218 | 638 | |
paul@218 | 639 | /* AIC definitions. */ |
paul@218 | 640 | |
paul@218 | 641 | void *aic_channels[] = {NULL, NULL}; |
paul@218 | 642 | |
paul@218 | 643 | const unsigned int num_aic_channels = 2; |
paul@218 | 644 | |
paul@218 | 645 | l4_cap_idx_t aic_irqs[] = {L4_INVALID_CAP}; |
paul@218 | 646 | |
paul@218 | 647 | |
paul@218 | 648 | |
paul@218 | 649 | /* CPM definitions. */ |
paul@218 | 650 | |
paul@218 | 651 | struct clock_info clocks[] = { |
paul@239 | 652 | {"ext", Clock_external, "EXCLK"}, |
paul@239 | 653 | {"ext_512", Clock_external_div_512, "EXCLK/512"}, |
paul@239 | 654 | {"rtc_ext", Clock_rtc_external, "RTCLK"}, |
paul@239 | 655 | {"plla", Clock_pll_A, "PLL A"}, |
paul@239 | 656 | {"plle", Clock_pll_E, "PLL E"}, |
paul@239 | 657 | {"pllm", Clock_pll_M, "PLL M"}, |
paul@239 | 658 | {"pllv", Clock_pll_V, "PLL V"}, |
paul@239 | 659 | {"main", Clock_main, "Main (SCLK_A)"}, |
paul@239 | 660 | {"cpu", Clock_cpu, "CPU"}, |
paul@240 | 661 | {"l2c", Clock_l2cache, "L2 cache"}, |
paul@239 | 662 | {"h2p", Clock_hclock2_pclock, "AHB2/APB"}, |
paul@239 | 663 | {"ahb0", Clock_hclock0, "AHB0"}, |
paul@239 | 664 | {"ahb2", Clock_hclock2, "AHB2"}, |
paul@239 | 665 | {"apb", Clock_pclock, "APB"}, |
paul@239 | 666 | {"dma", Clock_dma, "DMA"}, |
paul@239 | 667 | {"hdmi", Clock_lcd, "HDMI"}, |
paul@239 | 668 | {"lcd", Clock_lcd, "LCD"}, |
paul@239 | 669 | {"lcd0", Clock_lcd_pixel0, "LCD0 pixel"}, |
paul@239 | 670 | {"lcd1", Clock_lcd_pixel1, "LCD1 pixel"}, |
paul@239 | 671 | {"msc", Clock_msc, "MSC"}, |
paul@239 | 672 | {"msc0", Clock_msc0, "MSC0"}, |
paul@239 | 673 | {"msc1", Clock_msc1, "MSC1"}, |
paul@239 | 674 | {"msc2", Clock_msc1, "MSC2"}, |
paul@239 | 675 | {"otg0", Clock_otg0, "USB OTG0"}, |
paul@239 | 676 | {"otg1", Clock_otg1, "USB OTG1"}, |
paul@239 | 677 | {"i2c0", Clock_i2c0, "I2C0"}, |
paul@239 | 678 | {"i2c1", Clock_i2c1, "I2C1"}, |
paul@239 | 679 | {"i2c2", Clock_i2c2, "I2C2"}, |
paul@239 | 680 | {"i2c3", Clock_i2c3, "I2C3"}, |
paul@239 | 681 | {"i2c4", Clock_i2c4, "I2C4"}, |
paul@239 | 682 | {"i2s0", Clock_i2s0, "I2S0"}, |
paul@239 | 683 | {"i2s1", Clock_i2s1, "I2S1"}, |
paul@239 | 684 | {"pcm", Clock_pcm, "PCM"}, |
paul@239 | 685 | {"rtc", Clock_rtc, "RTC"}, |
paul@239 | 686 | {"ssi", Clock_ssi, "SSI"}, |
paul@239 | 687 | {"ssi0", Clock_ssi0, "SSI0"}, |
paul@239 | 688 | {"ssi1", Clock_ssi1, "SSI1"}, |
paul@239 | 689 | {"uart0", Clock_uart0, "UART0"}, |
paul@239 | 690 | {"uart1", Clock_uart1, "UART1"}, |
paul@239 | 691 | {"uart2", Clock_uart2, "UART2"}, |
paul@239 | 692 | {"uart3", Clock_uart3, "UART3"}, |
paul@239 | 693 | {"uart4", Clock_uart4, "UART4"}, |
paul@243 | 694 | {"usbphy", Clock_usb_phy, "USB PHY"}, |
paul@243 | 695 | {NULL, Clock_none, NULL}, |
paul@218 | 696 | }; |
paul@218 | 697 | |
paul@218 | 698 | |
paul@218 | 699 | |
paul@218 | 700 | /* DMA definitions. */ |
paul@218 | 701 | |
paul@218 | 702 | void *dma_channels[32] = {NULL}; |
paul@218 | 703 | |
paul@218 | 704 | const unsigned int num_dma_channels = 32; |
paul@218 | 705 | |
paul@221 | 706 | struct dma_region dma_regions[8]; |
paul@218 | 707 | |
paul@221 | 708 | const unsigned int num_dma_regions = 8; |
paul@218 | 709 | |
paul@218 | 710 | l4_cap_idx_t dma_irq = L4_INVALID_CAP; |
paul@218 | 711 | |
paul@218 | 712 | |
paul@218 | 713 | |
paul@218 | 714 | /* GPIO definitions. */ |
paul@218 | 715 | |
paul@218 | 716 | struct gpio_port gpio_ports[] = { |
paul@218 | 717 | {0x3fff00ff, 0x00000000}, |
paul@218 | 718 | {0xfff0f3fc, 0x000f0c03}, |
paul@218 | 719 | {0x0fffffff, 0x00000000}, |
paul@218 | 720 | {0xffff4fff, 0x0000b000}, |
paul@218 | 721 | {0xf0fff37c, 0x00000483}, |
paul@218 | 722 | {0x7fa7f00f, 0x00580ff0}, |
paul@218 | 723 | }; |
paul@218 | 724 | |
paul@218 | 725 | const unsigned int num_gpio_ports = 6; |
paul@218 | 726 | |
paul@218 | 727 | const char gpio_port_labels[] = "ABCDEF"; |
paul@218 | 728 | |
paul@218 | 729 | |
paul@218 | 730 | |
paul@218 | 731 | /* I2C definitions. */ |
paul@218 | 732 | |
paul@218 | 733 | void *i2c_channels[] = {NULL, NULL, NULL, NULL, NULL}; |
paul@218 | 734 | |
paul@218 | 735 | const unsigned int num_i2c_channels = 5; |
paul@218 | 736 | |
paul@218 | 737 | l4_cap_idx_t i2c_irqs[] = {L4_INVALID_CAP, L4_INVALID_CAP}; |
paul@218 | 738 | |
paul@218 | 739 | |
paul@218 | 740 | |
paul@258 | 741 | /* MSC definitions. */ |
paul@258 | 742 | |
paul@258 | 743 | void *msc_channels[] = {NULL, NULL, NULL}; |
paul@258 | 744 | |
paul@258 | 745 | const unsigned int num_msc_channels = 3; |
paul@258 | 746 | |
paul@258 | 747 | l4_cap_idx_t msc_irqs[] = {L4_INVALID_CAP, L4_INVALID_CAP, L4_INVALID_CAP}; |
paul@258 | 748 | |
paul@258 | 749 | |
paul@258 | 750 | |
paul@218 | 751 | /* SPI definitions. */ |
paul@218 | 752 | |
paul@218 | 753 | void *spi_channels[] = {NULL, NULL}; |
paul@218 | 754 | |
paul@218 | 755 | const unsigned int num_spi_channels = 2; |
paul@253 | 756 | |
paul@253 | 757 | |
paul@253 | 758 | |
paul@253 | 759 | /* TCU definitions. */ |
paul@253 | 760 | |
paul@253 | 761 | void *tcu_channels[] = {NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL}; |
paul@253 | 762 | |
paul@253 | 763 | const unsigned int num_tcu_channels = 8; |
paul@253 | 764 | |
paul@253 | 765 | l4_cap_idx_t tcu_irq = L4_INVALID_CAP; |