paul@114 | 1 | /* |
paul@114 | 2 | * I2C support for the JZ4730. |
paul@114 | 3 | * |
paul@114 | 4 | * Copyright (C) 2017, 2018, 2020 Paul Boddie <paul@boddie.org.uk> |
paul@114 | 5 | * |
paul@114 | 6 | * This program is free software; you can redistribute it and/or |
paul@114 | 7 | * modify it under the terms of the GNU General Public License as |
paul@114 | 8 | * published by the Free Software Foundation; either version 2 of |
paul@114 | 9 | * the License, or (at your option) any later version. |
paul@114 | 10 | * |
paul@114 | 11 | * This program is distributed in the hope that it will be useful, |
paul@114 | 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
paul@114 | 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
paul@114 | 14 | * GNU General Public License for more details. |
paul@114 | 15 | * |
paul@114 | 16 | * You should have received a copy of the GNU General Public License |
paul@114 | 17 | * along with this program; if not, write to the Free Software |
paul@114 | 18 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, |
paul@114 | 19 | * Boston, MA 02110-1301, USA |
paul@114 | 20 | */ |
paul@114 | 21 | |
paul@114 | 22 | #include <l4/devices/i2c-jz4730.h> |
paul@114 | 23 | #include <l4/devices/hw_mmio_register_block.h> |
paul@114 | 24 | |
paul@114 | 25 | #include <l4/sys/icu.h> |
paul@114 | 26 | #include <l4/util/util.h> |
paul@114 | 27 | |
paul@114 | 28 | #include <cstdio> |
paul@114 | 29 | |
paul@114 | 30 | /* |
paul@114 | 31 | I2C pins are dedicated to I2C only and are not GPIO-controlled: |
paul@114 | 32 | |
paul@114 | 33 | I2C0: Y4/SMB0_SDA, V5/SMB0_SCK |
paul@114 | 34 | |
paul@114 | 35 | Note that there is effectively only one I2C channel. |
paul@114 | 36 | */ |
paul@114 | 37 | |
paul@114 | 38 | enum Regs |
paul@114 | 39 | { |
paul@114 | 40 | I2c_data = 0x000, // I2CDR |
paul@114 | 41 | I2c_control = 0x004, // I2CCR |
paul@114 | 42 | I2c_status = 0x008, // I2CSR |
paul@114 | 43 | I2c_clock = 0x00c, // I2CGR |
paul@114 | 44 | }; |
paul@114 | 45 | |
paul@114 | 46 | enum I2c_control_bits : unsigned |
paul@114 | 47 | { |
paul@114 | 48 | I2c_control_enable_irq = 0x10, // IEN |
paul@114 | 49 | I2c_control_start = 0x08, // STA |
paul@114 | 50 | I2c_control_stop = 0x04, // STO |
paul@114 | 51 | I2c_control_nack = 0x02, // AC |
paul@114 | 52 | I2c_control_enable = 0x01, // I2CE |
paul@114 | 53 | }; |
paul@114 | 54 | |
paul@114 | 55 | enum I2c_status_bits : unsigned |
paul@114 | 56 | { |
paul@114 | 57 | I2c_status_buffer_nempty = 0x10, // STX |
paul@114 | 58 | I2c_status_busy = 0x08, // BUSY |
paul@114 | 59 | I2c_status_transmit_end = 0x04, // TEND |
paul@114 | 60 | I2c_status_data_valid = 0x02, // DRF |
paul@114 | 61 | I2c_status_nack = 0x01, // ACKF |
paul@114 | 62 | }; |
paul@114 | 63 | |
paul@114 | 64 | enum I2c_clock_values : unsigned |
paul@114 | 65 | { |
paul@114 | 66 | I2c_clock_max = 0xffff, |
paul@114 | 67 | I2c_clock_min = 0, |
paul@114 | 68 | }; |
paul@114 | 69 | |
paul@114 | 70 | |
paul@114 | 71 | |
paul@114 | 72 | // Initialise a channel. |
paul@114 | 73 | |
paul@114 | 74 | I2c_jz4730_channel::I2c_jz4730_channel(l4_addr_t start, |
paul@114 | 75 | Cpm_jz4730_chip *cpm, |
paul@114 | 76 | uint32_t frequency) |
paul@114 | 77 | : _cpm(cpm), _frequency(frequency) |
paul@114 | 78 | { |
paul@114 | 79 | _regs = new Hw::Mmio_register_block<32>(start); |
paul@114 | 80 | } |
paul@114 | 81 | |
paul@114 | 82 | // Enable the channel. |
paul@114 | 83 | |
paul@114 | 84 | void |
paul@114 | 85 | I2c_jz4730_channel::enable() |
paul@114 | 86 | { |
paul@114 | 87 | // Make sure that the I2C clock is available. |
paul@114 | 88 | |
paul@114 | 89 | _cpm->start_i2c(); |
paul@114 | 90 | |
paul@114 | 91 | // Set the bus clock frequency. |
paul@114 | 92 | |
paul@114 | 93 | set_frequency(); |
paul@114 | 94 | |
paul@114 | 95 | // Enable the channel and interrupts. |
paul@114 | 96 | |
paul@114 | 97 | _regs[I2c_control] = I2c_control_enable | I2c_control_enable_irq; |
paul@114 | 98 | while (!(_regs[I2c_control] & I2c_control_enable)); |
paul@114 | 99 | } |
paul@114 | 100 | |
paul@114 | 101 | // Disable the channel. |
paul@114 | 102 | |
paul@114 | 103 | void |
paul@114 | 104 | I2c_jz4730_channel::disable() |
paul@114 | 105 | { |
paul@114 | 106 | _regs[I2c_control] = 0; |
paul@114 | 107 | while (_regs[I2c_control] & I2c_control_enable); |
paul@114 | 108 | } |
paul@114 | 109 | |
paul@114 | 110 | // Set the frequency-related peripheral parameters. |
paul@114 | 111 | |
paul@114 | 112 | void |
paul@114 | 113 | I2c_jz4730_channel::set_frequency() |
paul@114 | 114 | { |
paul@114 | 115 | // The APB clock (PCLK) is used to drive I2C transfers. Its value must be |
paul@114 | 116 | // obtained from the CPM unit and is scaled to kHz in order to keep the |
paul@114 | 117 | // numbers easily representable, as is the bus frequency. |
paul@114 | 118 | |
paul@114 | 119 | uint32_t pclk = _cpm->get_pclock_frequency() / 1000; |
paul@114 | 120 | uint32_t i2c_clk = _frequency / 1000; |
paul@114 | 121 | uint32_t division = pclk / (16 * i2c_clk); |
paul@114 | 122 | |
paul@114 | 123 | if (division > I2c_clock_min) |
paul@114 | 124 | { |
paul@114 | 125 | division -= 1; |
paul@114 | 126 | if (division > I2c_clock_max) |
paul@114 | 127 | division = I2c_clock_max; |
paul@114 | 128 | } |
paul@114 | 129 | |
paul@114 | 130 | _regs[I2c_clock] = division; |
paul@114 | 131 | } |
paul@114 | 132 | |
paul@114 | 133 | // Present the address on the bus. |
paul@114 | 134 | |
paul@114 | 135 | void |
paul@114 | 136 | I2c_jz4730_channel::set_address(uint8_t address, bool read) |
paul@114 | 137 | { |
paul@114 | 138 | start(); |
paul@114 | 139 | |
paul@116 | 140 | _regs[I2c_data] = (address << 1) | (read ? 1 : 0); |
paul@114 | 141 | while (nack()); |
paul@114 | 142 | |
paul@114 | 143 | send_next(); |
paul@114 | 144 | |
paul@114 | 145 | if (read) |
paul@114 | 146 | while ((data_valid() || !transferred()) && !nack()); |
paul@114 | 147 | else |
paul@114 | 148 | while (data_valid() && !nack()); |
paul@114 | 149 | } |
paul@114 | 150 | |
paul@114 | 151 | // Read data from the bus. |
paul@114 | 152 | |
paul@114 | 153 | unsigned int |
paul@114 | 154 | I2c_jz4730_channel::read(uint8_t address, uint8_t buf[], unsigned int length) |
paul@114 | 155 | { |
paul@114 | 156 | unsigned int nread = 0; |
paul@114 | 157 | |
paul@114 | 158 | set_address(address, true); |
paul@114 | 159 | |
paul@114 | 160 | if (!nack()) |
paul@114 | 161 | { |
paul@114 | 162 | if (length == 1) |
paul@114 | 163 | signal_last(); |
paul@114 | 164 | |
paul@114 | 165 | while (nread < length) |
paul@114 | 166 | { |
paul@114 | 167 | while (!data_valid()); |
paul@114 | 168 | |
paul@114 | 169 | if (nread == length - 2) |
paul@114 | 170 | signal_last(); |
paul@114 | 171 | |
paul@114 | 172 | buf[nread++] = _regs[I2c_data]; |
paul@114 | 173 | request_next(); |
paul@114 | 174 | } |
paul@114 | 175 | } |
paul@114 | 176 | |
paul@114 | 177 | stop(); |
paul@114 | 178 | |
paul@114 | 179 | return nread; |
paul@114 | 180 | } |
paul@114 | 181 | |
paul@114 | 182 | // Write data to the bus. |
paul@114 | 183 | |
paul@114 | 184 | unsigned int |
paul@114 | 185 | I2c_jz4730_channel::write(uint8_t address, uint8_t buf[], unsigned int length) |
paul@114 | 186 | { |
paul@114 | 187 | unsigned int nwritten = 0; |
paul@114 | 188 | |
paul@114 | 189 | set_address(address, false); |
paul@114 | 190 | |
paul@114 | 191 | while ((nwritten < length) && !nack()) |
paul@114 | 192 | { |
paul@114 | 193 | _regs[I2c_data] = buf[nwritten++]; |
paul@114 | 194 | send_next(); |
paul@114 | 195 | |
paul@114 | 196 | while (data_valid() && !nack()); |
paul@114 | 197 | } |
paul@114 | 198 | |
paul@114 | 199 | stop(); |
paul@114 | 200 | |
paul@114 | 201 | while (!transferred()); |
paul@114 | 202 | |
paul@114 | 203 | return nwritten; |
paul@114 | 204 | } |
paul@114 | 205 | |
paul@114 | 206 | // Test for data validity. |
paul@114 | 207 | |
paul@114 | 208 | bool |
paul@114 | 209 | I2c_jz4730_channel::data_valid() |
paul@114 | 210 | { |
paul@114 | 211 | return (_regs[I2c_status] & I2c_status_data_valid) ? true : false; |
paul@114 | 212 | } |
paul@114 | 213 | |
paul@114 | 214 | // Request the next byte by clearing the data validity flag. |
paul@114 | 215 | |
paul@114 | 216 | void |
paul@114 | 217 | I2c_jz4730_channel::request_next() |
paul@114 | 218 | { |
paul@114 | 219 | _regs[I2c_status] = _regs[I2c_status] & ~I2c_status_data_valid; |
paul@114 | 220 | } |
paul@114 | 221 | |
paul@114 | 222 | // Indicate data ready for sending. |
paul@114 | 223 | |
paul@114 | 224 | void |
paul@114 | 225 | I2c_jz4730_channel::send_next() |
paul@114 | 226 | { |
paul@114 | 227 | _regs[I2c_status] = _regs[I2c_status] | I2c_status_data_valid; |
paul@114 | 228 | } |
paul@114 | 229 | |
paul@114 | 230 | // Test for non-acknowledgement. |
paul@114 | 231 | |
paul@114 | 232 | bool |
paul@114 | 233 | I2c_jz4730_channel::nack() |
paul@114 | 234 | { |
paul@114 | 235 | return (_regs[I2c_status] & I2c_status_nack) ? true : false; |
paul@114 | 236 | } |
paul@114 | 237 | |
paul@114 | 238 | // Set non-acknowledgement when receiving data. |
paul@114 | 239 | |
paul@114 | 240 | void |
paul@114 | 241 | I2c_jz4730_channel::signal_last() |
paul@114 | 242 | { |
paul@114 | 243 | _regs[I2c_control] = _regs[I2c_control] | I2c_control_nack; |
paul@114 | 244 | } |
paul@114 | 245 | |
paul@114 | 246 | // Test for write transfer completion. |
paul@114 | 247 | |
paul@114 | 248 | bool |
paul@114 | 249 | I2c_jz4730_channel::transferred() |
paul@114 | 250 | { |
paul@114 | 251 | return (_regs[I2c_status] & I2c_status_transmit_end) ? true : false; |
paul@114 | 252 | } |
paul@114 | 253 | |
paul@114 | 254 | // Explicitly start communication. |
paul@114 | 255 | |
paul@114 | 256 | void |
paul@114 | 257 | I2c_jz4730_channel::start() |
paul@114 | 258 | { |
paul@114 | 259 | _regs[I2c_control] = (_regs[I2c_control] & ~I2c_control_nack) | I2c_control_start; |
paul@114 | 260 | } |
paul@114 | 261 | |
paul@114 | 262 | // Explicitly stop communication. |
paul@114 | 263 | |
paul@114 | 264 | void |
paul@114 | 265 | I2c_jz4730_channel::stop() |
paul@114 | 266 | { |
paul@114 | 267 | _regs[I2c_control] = _regs[I2c_control] | I2c_control_stop; |
paul@114 | 268 | } |
paul@114 | 269 | |
paul@114 | 270 | |
paul@114 | 271 | |
paul@114 | 272 | // Initialise the I2C controller. |
paul@114 | 273 | |
paul@114 | 274 | I2c_jz4730_chip::I2c_jz4730_chip(l4_addr_t start, l4_addr_t end, |
paul@114 | 275 | Cpm_jz4730_chip *cpm, |
paul@114 | 276 | uint32_t frequency) |
paul@114 | 277 | : _start(start), _end(end), _cpm(cpm), _frequency(frequency) |
paul@114 | 278 | { |
paul@114 | 279 | } |
paul@114 | 280 | |
paul@114 | 281 | // Obtain a channel object. Only one channel is supported. |
paul@114 | 282 | |
paul@114 | 283 | I2c_jz4730_channel * |
paul@114 | 284 | I2c_jz4730_chip::get_channel(uint8_t channel) |
paul@114 | 285 | { |
paul@114 | 286 | if (channel == 0) |
paul@114 | 287 | return new I2c_jz4730_channel(_start, _cpm, _frequency); |
paul@114 | 288 | else |
paul@114 | 289 | throw -L4_EINVAL; |
paul@114 | 290 | } |
paul@114 | 291 | |
paul@114 | 292 | |
paul@114 | 293 | |
paul@114 | 294 | // C language interface functions. |
paul@114 | 295 | |
paul@114 | 296 | void *jz4730_i2c_init(l4_addr_t start, l4_addr_t end, void *cpm, uint32_t frequency) |
paul@114 | 297 | { |
paul@114 | 298 | return (void *) new I2c_jz4730_chip(start, end, static_cast<Cpm_jz4730_chip *>(cpm), frequency); |
paul@114 | 299 | } |
paul@114 | 300 | |
paul@114 | 301 | void *jz4730_i2c_get_channel(void *i2c, uint8_t channel) |
paul@114 | 302 | { |
paul@114 | 303 | return static_cast<I2c_jz4730_chip *>(i2c)->get_channel(channel); |
paul@114 | 304 | } |
paul@114 | 305 | |
paul@114 | 306 | void jz4730_i2c_disable(void *i2c_channel) |
paul@114 | 307 | { |
paul@114 | 308 | static_cast<I2c_jz4730_channel *>(i2c_channel)->disable(); |
paul@114 | 309 | } |
paul@114 | 310 | |
paul@114 | 311 | void jz4730_i2c_enable(void *i2c_channel) |
paul@114 | 312 | { |
paul@114 | 313 | static_cast<I2c_jz4730_channel *>(i2c_channel)->enable(); |
paul@114 | 314 | } |
paul@114 | 315 | |
paul@114 | 316 | unsigned int jz4730_i2c_read(void *i2c_channel, uint8_t address, uint8_t buf[], unsigned int length) |
paul@114 | 317 | { |
paul@114 | 318 | return static_cast<I2c_jz4730_channel *>(i2c_channel)->read(address, buf, length); |
paul@114 | 319 | } |
paul@114 | 320 | |
paul@114 | 321 | unsigned int jz4730_i2c_write(void *i2c_channel, uint8_t address, uint8_t buf[], unsigned int length) |
paul@114 | 322 | { |
paul@114 | 323 | return static_cast<I2c_jz4730_channel *>(i2c_channel)->write(address, buf, length); |
paul@114 | 324 | } |