1.1 --- a/pkg/devices/lib/cpm/include/cpm-jz4730.h Tue Sep 12 17:20:10 2023 +0200
1.2 +++ b/pkg/devices/lib/cpm/include/cpm-jz4730.h Thu Sep 14 00:11:14 2023 +0200
1.3 @@ -42,6 +42,13 @@
1.4 Hw::Register_block<32> _regs;
1.5 uint32_t _exclk_freq;
1.6
1.7 + // Utility methods.
1.8 +
1.9 + uint8_t _get_divider(uint32_t reg, uint32_t mask, uint8_t shift);
1.10 +
1.11 + // PLL status.
1.12 +
1.13 + int have_pll();
1.14 int pll_enabled();
1.15 int pll_bypassed();
1.16
1.17 @@ -52,39 +59,44 @@
1.18 public:
1.19 Cpm_jz4730_chip(l4_addr_t addr, uint32_t exclk_freq);
1.20
1.21 - int have_pll();
1.22 + // PLL configuration.
1.23
1.24 uint16_t get_multiplier();
1.25 uint8_t get_input_division();
1.26 uint8_t get_output_division();
1.27
1.28 - uint8_t _get_divider(uint32_t reg, uint32_t mask, uint8_t shift);
1.29 + // Divider configuration.
1.30 +
1.31 uint8_t get_cpu_divider();
1.32 uint8_t get_hclock_divider();
1.33 uint8_t get_pclock_divider();
1.34 uint8_t get_memory_divider();
1.35 uint8_t get_source_divider();
1.36 -
1.37 uint16_t get_lcd_pixel_divider();
1.38
1.39 void set_lcd_device_divider(uint8_t division);
1.40 void set_lcd_pixel_divider(uint16_t division);
1.41
1.42 - uint32_t get_frequency(enum Clock_frequency_identifiers clock);
1.43 - void set_frequency(enum Clock_frequency_identifiers clock, uint32_t frequency);
1.44 -
1.45 - int have_clock(enum Clock_identifiers clock);
1.46 - void start_clock(enum Clock_identifiers clock);
1.47 - void stop_clock(enum Clock_identifiers clock);
1.48 + // PLL frequency status.
1.49
1.50 uint32_t get_pll_frequency();
1.51 - uint32_t get_output_frequency();
1.52 - void update_output_frequency();
1.53 + uint32_t get_source_frequency();
1.54 +
1.55 + // Clock frequency status.
1.56
1.57 uint32_t get_cpu_frequency();
1.58 uint32_t get_hclock_frequency();
1.59 uint32_t get_pclock_frequency();
1.60 uint32_t get_memory_frequency();
1.61 +
1.62 + // Clock configuration.
1.63 +
1.64 + uint32_t get_frequency(enum Clock_identifiers clock);
1.65 + void set_frequency(enum Clock_identifiers clock, uint32_t frequency);
1.66 +
1.67 + int have_clock(enum Clock_identifiers clock);
1.68 + void start_clock(enum Clock_identifiers clock);
1.69 + void stop_clock(enum Clock_identifiers clock);
1.70 };
1.71
1.72 #endif /* __cplusplus */
1.73 @@ -105,14 +117,12 @@
1.74
1.75 uint16_t jz4730_cpm_get_lcd_pixel_divider(void *cpm);
1.76
1.77 -uint32_t jz4730_cpm_get_frequency(void *cpm, enum Clock_frequency_identifiers clock);
1.78 -void jz4730_cpm_set_frequency(void *cpm, enum Clock_frequency_identifiers clock, uint32_t frequency);
1.79 -
1.80 -void jz4730_cpm_update_output_frequency(void *cpm);
1.81 +uint32_t jz4730_cpm_get_frequency(void *cpm, enum Clock_identifiers clock);
1.82 +void jz4730_cpm_set_frequency(void *cpm, enum Clock_identifiers clock, uint32_t frequency);
1.83
1.84 uint32_t jz4730_cpm_get_cpu_frequency(void *cpm);
1.85 uint32_t jz4730_cpm_get_hclock_frequency(void *cpm);
1.86 -uint32_t jz4730_cpm_get_output_frequency(void *cpm);
1.87 +uint32_t jz4730_cpm_get_source_frequency(void *cpm);
1.88 uint32_t jz4730_cpm_get_pclock_frequency(void *cpm);
1.89 uint32_t jz4730_cpm_get_memory_frequency(void *cpm);
1.90