1.1 --- a/pkg/devices/lib/spi/src/jz4780.cc	Mon Nov 13 01:17:58 2023 +0100
     1.2 +++ b/pkg/devices/lib/spi/src/jz4780.cc	Mon Nov 13 01:18:52 2023 +0100
     1.3 @@ -1,5 +1,5 @@
     1.4  /*
     1.5 - * Perform SPI communication using the JZ4780 SPI peripheral.
     1.6 + * Perform SPI communication using the JZ4780/X1600 SPI peripheral.
     1.7   *
     1.8   * Copyright (C) 2023 Paul Boddie <paul@boddie.org.uk>
     1.9   *
    1.10 @@ -46,7 +46,8 @@
    1.11  
    1.12  enum Ssi_data_bits : unsigned
    1.13  {
    1.14 -  Ssi_data_gpc                    = 0x1000,
    1.15 +  Ssi_data_gpc_set                = 0x10000,
    1.16 +  Ssi_data_gpc_unset              = 0x00000,
    1.17  };
    1.18  
    1.19  enum Ssi_control0_bits : unsigned
    1.20 @@ -68,7 +69,7 @@
    1.21    Ssi_enable_recv_half_full       = 0x02000,
    1.22    Ssi_enable_trans_error          = 0x01000,
    1.23    Ssi_enable_recv_error           = 0x00800,
    1.24 -  Ssi_loop                        = 0x00400,
    1.25 +  Ssi_loopback                    = 0x00400,
    1.26    Ssi_recv_finish_control         = 0x00200,
    1.27    Ssi_recv_finished               = 0x00100,
    1.28    Ssi_enable_auto_clear_underrun  = 0x00080,
    1.29 @@ -100,6 +101,13 @@
    1.30    Ssi_clock_stop_delay_plus_2     = 0x08000000,
    1.31    Ssi_clock_stop_delay_plus_3     = 0x0c000000,
    1.32  
    1.33 +  /* X1600... */
    1.34 +
    1.35 +  Ssi_gpc_level_from_gpc_bit      = 0x00000000,
    1.36 +  Ssi_gpc_level_from_gpc_level    = 0x02000000,
    1.37 +
    1.38 +  /* Common... */
    1.39 +
    1.40    Ssi_interval_assert_ce_or_ce2   = 0x01000000,
    1.41    Ssi_trans_empty_unfinished      = 0x00800000,
    1.42  
    1.43 @@ -114,6 +122,12 @@
    1.44    Ssi_recv_threshold_mask         = 0x00000f00,
    1.45    Ssi_char_length_mask            = 0x000000f8,
    1.46  
    1.47 +  /* X1600... */
    1.48 +
    1.49 +  Ssi_gpc_level                   = 0x00000004, // see Ssi_gpc_level_from_gpc_level
    1.50 +
    1.51 +  /* Common... */
    1.52 +
    1.53    Spi_clock_assert_sample         = 0x00000000, // phase #0
    1.54    Spi_clock_assert_drive          = 0x00000002, // phase #1
    1.55    Spi_clock_idle_low_level        = 0x00000000, // polarity #0
    1.56 @@ -291,7 +305,7 @@
    1.57    {
    1.58      /* Relocate the data/command level to bit 16. */
    1.59  
    1.60 -    uint32_t command = dc[transferred] ? (1 << 16) : 0;
    1.61 +    uint32_t command = dc[transferred] ? Ssi_data_gpc_set : Ssi_data_gpc_unset;
    1.62      uint32_t value = data[transferred];
    1.63  
    1.64      /* Combine the character with the data/command bit. */
    1.65 @@ -326,7 +340,8 @@
    1.66  
    1.67      /* Relocate any command bit to bit 16 for byte characters. */
    1.68  
    1.69 -    uint32_t command = (char_size < 16) && (value & (1 << char_size)) ? (1 << 16) : 0;
    1.70 +    uint32_t command = (char_size < 16) && (value & (1 << char_size))
    1.71 +                       ? Ssi_data_gpc_set : Ssi_data_gpc_unset;
    1.72  
    1.73      /* Combine the character portion of the unit with the command. */
    1.74