1.1 --- a/pkg/devices/lib/cpm/include/cpm-x1600.h Thu Sep 14 00:11:14 2023 +0200
1.2 +++ b/pkg/devices/lib/cpm/include/cpm-x1600.h Thu Sep 14 00:13:02 2023 +0200
1.3 @@ -32,6 +32,20 @@
1.4
1.5 #include <l4/devices/hw_register_block.h>
1.6
1.7 +enum Clock_input_identifiers
1.8 +{
1.9 + Clock_input_ahb2_apb,
1.10 + Clock_input_external,
1.11 + Clock_input_main,
1.12 + Clock_input_none,
1.13 + Clock_input_pll_A,
1.14 + Clock_input_pll_E,
1.15 + Clock_input_pll_M,
1.16 + Clock_input_identifier_count, /* not a clock: limit for array definition */
1.17 +};
1.18 +
1.19 +
1.20 +
1.21 /* A simple abstraction for accessing the CPM registers.
1.22 * A proper device could inherit from Hw::Device and use an
1.23 * Int_property for _exclk_freq. */
1.24 @@ -46,7 +60,6 @@
1.25
1.26 uint32_t get_field(uint32_t reg, uint32_t mask, uint8_t shift);
1.27 void set_field(uint32_t reg, uint32_t mask, uint8_t shift, uint32_t value);
1.28 - uint8_t _get_divider(uint32_t reg, uint32_t mask, uint8_t shift);
1.29
1.30 // PLL control.
1.31
1.32 @@ -65,80 +78,46 @@
1.33 uint8_t get_output_division(uint32_t pll_reg);
1.34 void set_output_division(uint32_t pll_reg, uint8_t divider);
1.35
1.36 - // Clock dividers.
1.37 -
1.38 - void set_lcd_pixel_divider(uint8_t controller, uint16_t division);
1.39 -
1.40 // Input frequencies.
1.41
1.42 uint32_t get_pll_frequency(uint32_t pll_reg);
1.43 -
1.44 - // Clock sources.
1.45 -
1.46 - void set_hclock2_source(uint8_t source);
1.47 - void set_lcd_source(uint8_t controller, uint8_t source);
1.48 + uint32_t get_input_frequency(enum Clock_input_identifiers clock);
1.49
1.50 // Clock control.
1.51
1.52 - uint32_t get_clock_gate_register(enum Clock_identifiers clock);
1.53 - uint32_t get_clock_gate_value(enum Clock_identifiers clock);
1.54 + void change_disable(enum Clock_identifiers clock);
1.55 + void change_enable(enum Clock_identifiers clock);
1.56 + void wait_busy(enum Clock_identifiers clock);
1.57
1.58 public:
1.59 - void set_pclock_source(uint8_t source);
1.60 Cpm_x1600_chip(l4_addr_t addr, uint32_t exclk_freq);
1.61
1.62 int have_clock(enum Clock_identifiers clock);
1.63 void start_clock(enum Clock_identifiers clock);
1.64 void stop_clock(enum Clock_identifiers clock);
1.65
1.66 - // Clock divider values.
1.67 + // Clock dividers.
1.68
1.69 - uint8_t get_cpu_divider();
1.70 - uint8_t get_hclock0_divider();
1.71 - uint8_t get_hclock2_divider();
1.72 - uint8_t get_pclock_divider();
1.73 - uint8_t get_lcd_pixel_divider(uint8_t controller = 0);
1.74 - uint8_t get_memory_divider();
1.75 + uint32_t get_divider(enum Clock_identifiers clock);
1.76 + void set_divider(enum Clock_identifiers clock, uint32_t divider);
1.77
1.78 - // Input frequencies.
1.79 -
1.80 - uint8_t get_main_source();
1.81 - uint32_t get_main_frequency();
1.82 -
1.83 - // Clock sources, providing the input frequency.
1.84 + // Clock sources.
1.85
1.86 - uint8_t get_cpu_source();
1.87 - uint8_t get_hclock0_source();
1.88 - uint8_t get_hclock2_source();
1.89 - uint8_t get_lcd_source(uint8_t controller);
1.90 - uint8_t get_lcd_source() { return get_lcd_source(0); }
1.91 - uint8_t get_memory_source();
1.92 - uint8_t get_pclock_source();
1.93 + uint8_t get_source(enum Clock_identifiers clock);
1.94 + void set_source(enum Clock_identifiers clock, uint8_t source);
1.95
1.96 - uint32_t get_cpu_source_frequency();
1.97 - uint32_t get_hclock0_source_frequency();
1.98 - uint32_t get_hclock2_source_frequency();
1.99 - uint32_t get_lcd_source_frequency(uint8_t controller);
1.100 - uint32_t get_lcd_source_frequency() { return get_lcd_source_frequency(0); }
1.101 - uint32_t get_memory_source_frequency();
1.102 - uint32_t get_pclock_source_frequency();
1.103 -
1.104 - // Final, calculated frequencies.
1.105 + // Source frequencies.
1.106
1.107 - uint32_t get_cpu_frequency();
1.108 - uint32_t get_hclock0_frequency();
1.109 - uint32_t get_hclock2_frequency();
1.110 - uint32_t get_memory_frequency();
1.111 - uint32_t get_pclock_frequency();
1.112 + uint32_t get_source_frequency(enum Clock_identifiers clock);
1.113
1.114 - uint32_t get_apll_frequency();
1.115 - uint32_t get_epll_frequency();
1.116 - uint32_t get_mpll_frequency();
1.117 -
1.118 - void set_pll_parameters(uint32_t pll_reg, uint16_t multiplier, uint8_t in_divider, uint8_t out_divider);
1.119 + // Output clock frequencies.
1.120
1.121 uint32_t get_frequency(enum Clock_identifiers clock);
1.122 void set_frequency(enum Clock_identifiers clock, uint32_t frequency);
1.123 +
1.124 + // Other operations.
1.125 +
1.126 + void set_pll_parameters(uint32_t pll_reg, uint16_t multiplier, uint8_t in_divider, uint8_t out_divider);
1.127 };
1.128
1.129 #endif /* __cplusplus */
1.130 @@ -155,39 +134,13 @@
1.131 void x1600_cpm_start_clock(void *cpm, enum Clock_identifiers clock);
1.132 void x1600_cpm_stop_clock(void *cpm, enum Clock_identifiers clock);
1.133
1.134 -uint8_t x1600_cpm_get_cpu_divider(void *cpm);
1.135 -uint8_t x1600_cpm_get_hclock0_divider(void *cpm);
1.136 -uint8_t x1600_cpm_get_hclock2_divider(void *cpm);
1.137 -uint8_t x1600_cpm_get_lcd_pixel_divider(void *cpm);
1.138 -uint8_t x1600_cpm_get_memory_divider(void *cpm);
1.139 -uint8_t x1600_cpm_get_pclock_divider(void *cpm);
1.140 -
1.141 -uint8_t x1600_cpm_get_hclock0_source(void *cpm);
1.142 -uint8_t x1600_cpm_get_hclock2_source(void *cpm);
1.143 -uint8_t x1600_cpm_get_lcd_source(void *cpm);
1.144 -uint8_t x1600_cpm_get_memory_source(void *cpm);
1.145 -uint8_t x1600_cpm_get_pclock_source(void *cpm);
1.146 +uint32_t x1600_cpm_get_divider(void *cpm, enum Clock_identifiers clock);
1.147 +void x1600_cpm_set_divider(void *cpm, enum Clock_identifiers clock, uint32_t divider);
1.148
1.149 -uint32_t x1600_cpm_get_hclock0_source_frequency(void *cpm);
1.150 -uint32_t x1600_cpm_get_hclock2_source_frequency(void *cpm);
1.151 -uint32_t x1600_cpm_get_lcd_source_frequency(void *cpm);
1.152 -uint32_t x1600_cpm_get_memory_source_frequency(void *cpm);
1.153 -uint32_t x1600_cpm_get_pclock_source_frequency(void *cpm);
1.154 -
1.155 -void x1600_cpm_set_pclock_source(void *cpm, uint8_t source);
1.156 +uint8_t x1600_cpm_get_source(void *cpm, enum Clock_identifiers clock);
1.157 +void x1600_cpm_set_source(void *cpm, enum Clock_identifiers clock, uint8_t source);
1.158
1.159 -uint8_t x1600_cpm_get_main_source(void *cpm);
1.160 -uint32_t x1600_cpm_get_main_frequency(void *cpm);
1.161 -
1.162 -uint32_t x1600_cpm_get_cpu_frequency(void *cpm);
1.163 -uint32_t x1600_cpm_get_hclock0_frequency(void *cpm);
1.164 -uint32_t x1600_cpm_get_hclock2_frequency(void *cpm);
1.165 -uint32_t x1600_cpm_get_memory_frequency(void *cpm);
1.166 -uint32_t x1600_cpm_get_pclock_frequency(void *cpm);
1.167 -
1.168 -uint32_t x1600_cpm_get_apll_frequency(void *cpm);
1.169 -uint32_t x1600_cpm_get_epll_frequency(void *cpm);
1.170 -uint32_t x1600_cpm_get_mpll_frequency(void *cpm);
1.171 +uint32_t x1600_cpm_get_source_frequency(void *cpm, enum Clock_identifiers clock);
1.172
1.173 uint32_t x1600_cpm_get_frequency(void *cpm, enum Clock_identifiers clock);
1.174 void x1600_cpm_set_frequency(void *cpm, enum Clock_identifiers clock, uint32_t frequency);