1.1 --- a/pkg/landfall-examples/hw_info/x1600.c Thu Nov 16 17:48:32 2023 +0100
1.2 +++ b/pkg/landfall-examples/hw_info/x1600.c Thu Nov 16 22:03:51 2023 +0100
1.3 @@ -341,6 +341,16 @@
1.4 x1600_rtc_enable(rtc);
1.5 }
1.6
1.7 +void rtc_alarm_disable(void *rtc)
1.8 +{
1.9 + x1600_rtc_alarm_disable(rtc);
1.10 +}
1.11 +
1.12 +void rtc_alarm_enable(void *rtc)
1.13 +{
1.14 + x1600_rtc_alarm_enable(rtc);
1.15 +}
1.16 +
1.17 uint32_t rtc_get_seconds(void *rtc)
1.18 {
1.19 return x1600_rtc_get_seconds(rtc);
1.20 @@ -465,33 +475,36 @@
1.21 /* CPM definitions. */
1.22
1.23 struct clock_info clocks[] = {
1.24 - {"ext", Clock_external, "External"},
1.25 - {"plla", Clock_pll_A, "PLL A"},
1.26 - {"plle", Clock_pll_E, "PLL E"},
1.27 - {"pllm", Clock_pll_M, "PLL M"},
1.28 - {"main", Clock_main, "Main"},
1.29 - {"cpu", Clock_cpu, "CPU"},
1.30 - {"ahb0", Clock_hclock0, "AHB0"},
1.31 - {"ahb2", Clock_hclock2, "AHB2"},
1.32 - {"apb", Clock_pclock, "APB"},
1.33 - {"aic", Clock_aic, "AIC"},
1.34 - {"dma", Clock_dma, "DMA"},
1.35 - {"lcd0", Clock_lcd_pixel0, "LCD pixel"},
1.36 - {"msc0", Clock_msc0, "MSC0"},
1.37 - {"msc1", Clock_msc1, "MSC1"},
1.38 - {"otg", Clock_otg0, "USB OTG"},
1.39 - {"i2c0", Clock_i2c0, "I2C0"},
1.40 - {"i2c1", Clock_i2c1, "I2C1"},
1.41 - {"i2s0", Clock_i2s0, "I2S0"},
1.42 - {"i2s1", Clock_i2s1, "I2S1"},
1.43 - {"i2s0r", Clock_i2s0_rx, "I2S0 RX"},
1.44 - {"i2s0t", Clock_i2s0_tx, "I2S0 TX"},
1.45 - {"ssi0", Clock_ssi0, "SSI"},
1.46 - {"uart0", Clock_uart0, "UART0"},
1.47 - {"uart1", Clock_uart1, "UART1"},
1.48 - {"uart2", Clock_uart2, "UART2"},
1.49 - {"uart3", Clock_uart3, "UART3"},
1.50 - {NULL, Clock_undefined, NULL},
1.51 + {"ext", Clock_external, "EXCLK"},
1.52 + {"ext_512", Clock_external_div_512, "EXCLK/512"},
1.53 + {"rtc_ext", Clock_rtc_external, "RTCLK"},
1.54 + {"plla", Clock_pll_A, "PLL A"},
1.55 + {"plle", Clock_pll_E, "PLL E"},
1.56 + {"pllm", Clock_pll_M, "PLL M"},
1.57 + {"main", Clock_main, "Main (SCLK_A)"},
1.58 + {"cpu", Clock_cpu, "CPU"},
1.59 + {"ahb0", Clock_hclock0, "AHB0"},
1.60 + {"ahb2", Clock_hclock2, "AHB2"},
1.61 + {"apb", Clock_pclock, "APB"},
1.62 + {"aic", Clock_aic, "AIC"},
1.63 + {"dma", Clock_dma, "DMA"},
1.64 + {"lcd0", Clock_lcd_pixel0, "LCD pixel"},
1.65 + {"msc0", Clock_msc0, "MSC0"},
1.66 + {"msc1", Clock_msc1, "MSC1"},
1.67 + {"otg", Clock_otg0, "USB OTG"},
1.68 + {"i2c0", Clock_i2c0, "I2C0"},
1.69 + {"i2c1", Clock_i2c1, "I2C1"},
1.70 + {"i2s0", Clock_i2s0, "I2S0"},
1.71 + {"i2s1", Clock_i2s1, "I2S1"},
1.72 + {"i2s0r", Clock_i2s0_rx, "I2S0 RX"},
1.73 + {"i2s0t", Clock_i2s0_tx, "I2S0 TX"},
1.74 + {"rtc", Clock_rtc, "RTC"},
1.75 + {"ssi0", Clock_ssi0, "SSI"},
1.76 + {"uart0", Clock_uart0, "UART0"},
1.77 + {"uart1", Clock_uart1, "UART1"},
1.78 + {"uart2", Clock_uart2, "UART2"},
1.79 + {"uart3", Clock_uart3, "UART3"},
1.80 + {NULL, Clock_undefined, NULL},
1.81 };
1.82
1.83