1.1 --- a/pkg/devices/lib/cpm/src/jz4780.cc Fri Nov 17 14:09:35 2023 +0100
1.2 +++ b/pkg/devices/lib/cpm/src/jz4780.cc Fri Nov 17 18:38:44 2023 +0100
1.3 @@ -92,6 +92,7 @@
1.4 Clock_source_pcm (Divider_pcm, 7, 29), // PCMS, PCMPCS
1.5 Clock_source_ssi (Divider_ssi, 3, 30), // SCS, SPCS
1.6 Clock_source_uhc (Divider_uhc, 3, 30), // UHCS
1.7 + Clock_source_usb_phy (Usb_param_control1, 3, 24), // REFCLKDIV
1.8 Clock_source_vpu (Divider_vpu, 3, 30), // VCS
1.9
1.10 Clock_busy_cpu (Clock_status, 1, 0),
1.11 @@ -239,8 +240,9 @@
1.12 // Multiplexer instances.
1.13
1.14 #define Clocks(...) ((enum Clock_identifiers []) {__VA_ARGS__})
1.15 +#define Specific(CLOCK) ((enum Clock_identifiers) (CLOCK))
1.16
1.17 -static Mux mux_external (Clock_external),
1.18 +static Mux mux_external (Clock_external),
1.19
1.20 // Clocks being propagated to others.
1.21
1.22 @@ -262,6 +264,8 @@
1.23 mux_dev (3, Clocks(Clock_none, Clock_main, Clock_pll_M)),
1.24 mux_lcd (3, Clocks(Clock_main, Clock_pll_M, Clock_pll_V)),
1.25 mux_usb (3, Clocks(Clock_main, Clock_pll_M, Clock_pll_E /* , OTG PHY */)),
1.26 + mux_usb_phy (4, Clocks(Specific(Clock_usb_phy_12MHz), Specific(Clock_usb_phy_24MHz),
1.27 + Specific(Clock_usb_phy_48MHz), Specific(Clock_usb_phy_19_2MHz))),
1.28
1.29 // Clock selectors involving the external clock.
1.30
1.31 @@ -277,7 +281,11 @@
1.32 static Clock_null clock_none;
1.33
1.34 static Clock_passive clock_external(48000000),
1.35 - clock_rtc_external(32768);
1.36 + clock_rtc_external(32768),
1.37 + clock_usb_phy_12MHz(12000000),
1.38 + clock_usb_phy_19_2MHz(19200000),
1.39 + clock_usb_phy_24MHz(24000000),
1.40 + clock_usb_phy_48MHz(48000000);
1.41
1.42
1.43
1.44 @@ -348,6 +356,8 @@
1.45
1.46 clock_uart4((Source(mux_external)), (Control(Clock_gate_uart4))),
1.47
1.48 + clock_usb_phy(Source(mux_usb_phy, Clock_source_usb_phy)),
1.49 +
1.50 clock_x2d((Source(mux_external)), (Control(Clock_gate_x2d))),
1.51
1.52 // Special parent clock for hclock2 and pclock.
1.53 @@ -475,7 +485,9 @@
1.54
1.55 // Clock register.
1.56
1.57 -static Clock_base *clocks[Clock_identifier_count] = {
1.58 +static Clock_base *clocks[Clock_jz4780_identifier_count] = {
1.59 + &clock_none,
1.60 +
1.61 &clock_none, // Clock_aic
1.62 &clock_none, // Clock_aic_bitclk
1.63 &clock_none, // Clock_aic_pclk
1.64 @@ -516,7 +528,6 @@
1.65 &clock_msc0,
1.66 &clock_msc1,
1.67 &clock_msc2,
1.68 - &clock_none, // Clock_none
1.69 &clock_otg0,
1.70 &clock_otg1,
1.71 &clock_pclock,
1.72 @@ -544,7 +555,15 @@
1.73 &clock_none, // Clock_udc
1.74 &clock_uhc,
1.75 &clock_none, // Clock_uprt
1.76 + &clock_usb_phy,
1.77 &clock_vpu,
1.78 +
1.79 + /* JZ4780-specific clocks. */
1.80 +
1.81 + &clock_usb_phy_12MHz,
1.82 + &clock_usb_phy_19_2MHz,
1.83 + &clock_usb_phy_24MHz,
1.84 + &clock_usb_phy_48MHz,
1.85 };
1.86
1.87