1.1 --- a/pkg/devices/lib/dma/include/dma-jz4730.h Wed Apr 24 00:47:34 2024 +0200
1.2 +++ b/pkg/devices/lib/dma/include/dma-jz4730.h Sat Apr 27 23:46:28 2024 +0200
1.3 @@ -1,7 +1,7 @@
1.4 /*
1.5 * DMA support for the JZ4730.
1.6 *
1.7 - * Copyright (C) 2021, 2023 Paul Boddie <paul@boddie.org.uk>
1.8 + * Copyright (C) 2021, 2023, 2024 Paul Boddie <paul@boddie.org.uk>
1.9 *
1.10 * This program is free software; you can redistribute it and/or
1.11 * modify it under the terms of the GNU General Public License as
1.12 @@ -77,7 +77,7 @@
1.13
1.14 #ifdef __cplusplus
1.15
1.16 -#include <l4/devices/cpm-jz4730.h>
1.17 +#include <l4/devices/dma-generic.h>
1.18 #include <l4/devices/hw_mmio_register_block.h>
1.19
1.20 // Forward declaration.
1.21 @@ -88,11 +88,11 @@
1.22
1.23 // DMA channel.
1.24
1.25 -class Dma_jz4730_channel
1.26 +class Dma_jz4730_channel : public Dma_channel
1.27 {
1.28 private:
1.29 Hw::Register_block<32> _regs;
1.30 - Dma_jz4730_chip *_chip;
1.31 + Dma_chip *_chip;
1.32 uint8_t _channel;
1.33 l4_cap_idx_t _irq = L4_INVALID_CAP;
1.34
1.35 @@ -104,14 +104,16 @@
1.36 enum Dma_jz4730_ext_req_detect_mode _ext_req_detect_mode = Dma_ext_req_detect_mode_high_level;
1.37
1.38 public:
1.39 - Dma_jz4730_channel(Dma_jz4730_chip *chip, uint8_t channel, l4_addr_t start, l4_cap_idx_t irq);
1.40 + Dma_jz4730_channel(Dma_chip *chip, uint8_t channel, l4_addr_t start, l4_cap_idx_t irq);
1.41
1.42 unsigned int transfer(uint32_t source, uint32_t destination,
1.43 unsigned int count,
1.44 bool source_increment, bool destination_increment,
1.45 uint8_t source_width, uint8_t destination_width,
1.46 uint8_t transfer_unit_size,
1.47 - enum Dma_jz4730_request_type type=Dma_request_auto);
1.48 + int type=Dma_request_auto,
1.49 + l4_addr_t desc_vaddr = 0,
1.50 + l4re_dma_space_dma_addr_t desc_paddr = 0);
1.51
1.52 unsigned int wait();
1.53
1.54 @@ -159,25 +161,27 @@
1.55
1.56 // DMA device control.
1.57
1.58 -class Dma_jz4730_chip
1.59 +class Dma_jz4730_chip : public Dma_chip
1.60 {
1.61 private:
1.62 Hw::Register_block<32> _regs;
1.63 l4_addr_t _start, _end;
1.64 - Cpm_jz4730_chip *_cpm;
1.65 + Cpm_chip *_cpm;
1.66
1.67 public:
1.68 - Dma_jz4730_chip(l4_addr_t start, l4_addr_t end, Cpm_jz4730_chip *cpm);
1.69 + Dma_jz4730_chip(l4_addr_t start, l4_addr_t end, Cpm_chip *cpm);
1.70
1.71 void disable();
1.72
1.73 void enable();
1.74
1.75 - Dma_jz4730_channel *get_channel(uint8_t channel, l4_cap_idx_t irq);
1.76 + Dma_channel *get_channel(uint8_t channel, l4_cap_idx_t irq);
1.77
1.78 bool have_interrupt(uint8_t channel);
1.79 };
1.80
1.81 +Dma_chip *jz4730_dma_chip(l4_addr_t start, l4_addr_t end, Cpm_chip *cpm);
1.82 +
1.83 #endif /* __cplusplus */
1.84
1.85