1 /* 2 * Access various peripherals on a board using the JZ4780. 3 * 4 * Copyright (C) 2023, 2024 Paul Boddie <paul@boddie.org.uk> 5 * 6 * This program is free software; you can redistribute it and/or 7 * modify it under the terms of the GNU General Public License as 8 * published by the Free Software Foundation; either version 2 of 9 * the License, or (at your option) any later version. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 * GNU General Public License for more details. 15 * 16 * You should have received a copy of the GNU General Public License 17 * along with this program; if not, write to the Free Software 18 * Foundation, Inc., 51 Franklin Street, Fifth Floor, 19 * Boston, MA 02110-1301, USA 20 */ 21 22 /* NOTE: AIC support should be replaced. The CI20 should be able to send I2S 23 audio over HDMI or via its internal codec to the headphone socket. */ 24 25 #include <l4/devices/aic-x1600.h> 26 27 #include <l4/devices/cpm-jz4780.h> 28 #include <l4/devices/dma-jz4780.h> 29 #include <l4/devices/gpio-jz4780.h> 30 #include <l4/devices/i2c-jz4780.h> 31 #include <l4/devices/msc-jz4780.h> 32 33 /* The X1600 RTC functionality is a subset of that in the JZ4780. */ 34 35 #include <l4/devices/rtc-x1600.h> 36 37 /* GPIO-based SPI can use arbitrary pins, whereas on the CI20 only the secondary 38 header provides pins like GPC. */ 39 40 #include <l4/devices/spi-gpio.h> 41 #include <l4/devices/spi-hybrid.h> 42 #include <l4/devices/spi-jz4780.h> 43 #include <l4/devices/tcu-jz4780.h> 44 #include "common.h" 45 46 47 48 /* AIC adapter functions. */ 49 50 void *aic_init(l4_addr_t aic_start, l4_addr_t start, l4_addr_t end, void *cpm) 51 { 52 return x1600_aic_init(aic_start, start, end, cpm); 53 } 54 55 void *aic_get_channel(void *aic, int num, void *channel) 56 { 57 return x1600_aic_get_channel(aic, num, channel); 58 } 59 60 unsigned int aic_transfer(void *channel, l4re_dma_space_dma_addr_t paddr, 61 uint32_t count, uint32_t sample_rate, 62 uint8_t sample_size) 63 { 64 return x1600_aic_transfer(channel, paddr, count, sample_rate, sample_size); 65 } 66 67 68 69 /* CPM adapter functions. */ 70 71 void *cpm_init(l4_addr_t cpm_base) 72 { 73 return jz4780_cpm_init(cpm_base); 74 } 75 76 const char *cpm_clock_type(void *cpm, enum Clock_identifiers clock) 77 { 78 return jz4780_cpm_clock_type(cpm, clock); 79 } 80 81 int cpm_have_clock(void *cpm, enum Clock_identifiers clock) 82 { 83 return jz4780_cpm_have_clock(cpm, clock); 84 } 85 86 void cpm_start_clock(void *cpm, enum Clock_identifiers clock) 87 { 88 jz4780_cpm_start_clock(cpm, clock); 89 } 90 91 void cpm_stop_clock(void *cpm, enum Clock_identifiers clock) 92 { 93 jz4780_cpm_stop_clock(cpm, clock); 94 } 95 96 int cpm_get_parameters(void *cpm, enum Clock_identifiers clock, 97 uint32_t parameters[]) 98 { 99 return jz4780_cpm_get_parameters(cpm, clock, parameters); 100 } 101 102 int cpm_set_parameters(void *cpm, enum Clock_identifiers clock, 103 int num_parameters, uint32_t parameters[]) 104 { 105 return jz4780_cpm_set_parameters(cpm, clock, num_parameters, parameters); 106 } 107 108 uint8_t cpm_get_source(void *cpm, enum Clock_identifiers clock) 109 { 110 return jz4780_cpm_get_source(cpm, clock); 111 } 112 113 void cpm_set_source(void *cpm, enum Clock_identifiers clock, uint8_t source) 114 { 115 jz4780_cpm_set_source(cpm, clock, source); 116 } 117 118 enum Clock_identifiers cpm_get_source_clock(void *cpm, enum Clock_identifiers clock) 119 { 120 return jz4780_cpm_get_source_clock(cpm, clock); 121 } 122 123 void cpm_set_source_clock(void *cpm, enum Clock_identifiers clock, enum Clock_identifiers source) 124 { 125 jz4780_cpm_set_source_clock(cpm, clock, source); 126 } 127 128 uint64_t cpm_get_source_frequency(void *cpm, enum Clock_identifiers clock) 129 { 130 return jz4780_cpm_get_source_frequency(cpm, clock); 131 } 132 133 uint64_t cpm_get_frequency(void *cpm, enum Clock_identifiers clock) 134 { 135 return jz4780_cpm_get_frequency(cpm, clock); 136 } 137 138 int cpm_set_frequency(void *cpm, enum Clock_identifiers clock, uint64_t frequency) 139 { 140 return jz4780_cpm_set_frequency(cpm, clock, frequency); 141 } 142 143 144 145 /* DMA adapter functions. */ 146 147 void *dma_init(l4_addr_t start, l4_addr_t end, void *cpm) 148 { 149 return jz4780_dma_init(start, end, cpm); 150 } 151 152 void dma_disable(void *dma_chip) 153 { 154 jz4780_dma_disable(dma_chip); 155 } 156 157 void dma_enable(void *dma_chip) 158 { 159 jz4780_dma_enable(dma_chip); 160 } 161 162 void *dma_get_channel(void *dma, uint8_t channel, l4_cap_idx_t irq) 163 { 164 return jz4780_dma_get_channel(dma, channel, irq); 165 } 166 167 unsigned int dma_transfer(void *dma_channel, 168 uint32_t source, uint32_t destination, 169 unsigned int count, 170 int source_increment, int destination_increment, 171 uint8_t source_width, uint8_t destination_width, 172 uint8_t transfer_unit_size, 173 int type) 174 { 175 return jz4780_dma_transfer(dma_channel, source, destination, count, 176 source_increment, destination_increment, 177 source_width, destination_width, 178 transfer_unit_size, type); 179 } 180 181 unsigned int dma_wait(void *dma_channel) 182 { 183 return jz4780_dma_wait(dma_channel); 184 } 185 186 187 188 /* GPIO adapter functions. */ 189 190 void *gpio_init(l4_addr_t start, l4_addr_t end, unsigned pins, 191 l4_uint32_t pull_ups, l4_uint32_t pull_downs) 192 { 193 return jz4780_gpio_init(start, end, pins, pull_ups, pull_downs); 194 } 195 196 void gpio_setup(void *gpio, unsigned pin, unsigned mode, int value) 197 { 198 jz4780_gpio_setup(gpio, pin, mode, value); 199 } 200 201 void gpio_config_pull(void *gpio, unsigned pin, unsigned mode) 202 { 203 jz4780_gpio_config_pull(gpio, pin, mode); 204 } 205 206 void gpio_config_pad(void *gpio, unsigned pin, unsigned func, unsigned value) 207 { 208 jz4780_gpio_config_pad(gpio, pin, func, value); 209 } 210 211 void gpio_config_get(void *gpio, unsigned pin, unsigned reg, unsigned *value) 212 { 213 jz4780_gpio_config_get(gpio, pin, reg, value); 214 } 215 216 void gpio_config_pad_get(void *gpio, unsigned pin, unsigned *func, unsigned *value) 217 { 218 jz4780_gpio_config_pad_get(gpio, pin, func, value); 219 } 220 221 void gpio_multi_setup(void *gpio, Pin_slice const *mask, unsigned mode, unsigned outvalues) 222 { 223 jz4780_gpio_multi_setup(gpio, mask, mode, outvalues); 224 } 225 226 void gpio_multi_config_pad(void *gpio, Pin_slice const *mask, unsigned func, unsigned value) 227 { 228 jz4780_gpio_multi_config_pad(gpio, mask, func, value); 229 } 230 231 void gpio_multi_set(void *gpio, Pin_slice const *mask, unsigned data) 232 { 233 jz4780_gpio_multi_set(gpio, mask, data); 234 } 235 236 unsigned gpio_multi_get(void *gpio, unsigned offset) 237 { 238 return jz4780_gpio_multi_get(gpio, offset); 239 } 240 241 int gpio_get(void *gpio, unsigned pin) 242 { 243 return jz4780_gpio_get(gpio, pin); 244 } 245 246 void gpio_set(void *gpio, unsigned pin, int value) 247 { 248 jz4780_gpio_set(gpio, pin, value); 249 } 250 251 void *gpio_get_irq(void *gpio, unsigned pin) 252 { 253 return jz4780_gpio_get_irq(gpio, pin); 254 } 255 256 bool gpio_irq_set_mode(void *gpio_irq, unsigned mode) 257 { 258 return jz4780_gpio_irq_set_mode(gpio_irq, mode); 259 } 260 261 262 263 /* I2C adapter functions. */ 264 265 void *i2c_init(l4_addr_t start, l4_addr_t end, void *cpm, 266 uint32_t frequency) 267 { 268 return jz4780_i2c_init(start, end, cpm, frequency); 269 } 270 271 void *i2c_get_channel(void *i2c, uint8_t channel) 272 { 273 return jz4780_i2c_get_channel(i2c, channel); 274 } 275 276 uint32_t i2c_get_frequency(void *i2c_channel) 277 { 278 return jz4780_i2c_get_frequency(i2c_channel); 279 } 280 281 void i2c_set_target(void *i2c_channel, uint8_t addr) 282 { 283 return jz4780_i2c_set_target(i2c_channel, addr); 284 } 285 286 void i2c_start_read(void *i2c_channel, uint8_t buf[], unsigned int total, 287 int stop) 288 { 289 jz4780_i2c_start_read(i2c_channel, buf, total, stop); 290 } 291 292 void i2c_read(void *i2c_channel) 293 { 294 jz4780_i2c_read(i2c_channel); 295 } 296 297 void i2c_start_write(void *i2c_channel, uint8_t buf[], unsigned int total, 298 int stop) 299 { 300 jz4780_i2c_start_write(i2c_channel, buf, total, stop); 301 } 302 303 void i2c_write(void *i2c_channel) 304 { 305 jz4780_i2c_write(i2c_channel); 306 } 307 308 int i2c_read_done(void *i2c_channel) 309 { 310 return jz4780_i2c_read_done(i2c_channel); 311 } 312 313 int i2c_write_done(void *i2c_channel) 314 { 315 return jz4780_i2c_write_done(i2c_channel); 316 } 317 318 unsigned int i2c_have_read(void *i2c_channel) 319 { 320 return jz4780_i2c_have_read(i2c_channel); 321 } 322 323 unsigned int i2c_have_written(void *i2c_channel) 324 { 325 return jz4780_i2c_have_written(i2c_channel); 326 } 327 328 int i2c_failed(void *i2c_channel) 329 { 330 return jz4780_i2c_failed(i2c_channel); 331 } 332 333 void i2c_stop(void *i2c_channel) 334 { 335 jz4780_i2c_stop(i2c_channel); 336 } 337 338 339 340 /* MSC adapter functions. */ 341 342 void *msc_init(l4_addr_t msc_start, l4_addr_t start, l4_addr_t end) 343 { 344 return jz4780_msc_init(msc_start, start, end); 345 } 346 347 void *msc_get_channel(void *msc, uint8_t channel, l4_cap_idx_t irq, void *dma) 348 { 349 return jz4780_msc_get_channel(msc, channel, irq, dma); 350 } 351 352 uint32_t msc_get_status(void *msc_channel) 353 { 354 return jz4780_msc_get_status(msc_channel); 355 } 356 357 void msc_enable(void *msc_channel) 358 { 359 jz4780_msc_enable(msc_channel); 360 } 361 362 uint32_t msc_read_block(void *msc_channel, uint8_t card, l4re_dma_space_dma_addr_t paddr) 363 { 364 return jz4780_msc_read_block(msc_channel, card, paddr); 365 } 366 367 368 369 /* RTC adapter functions. */ 370 371 void *rtc_init(l4_addr_t start, void *cpm) 372 { 373 /* Ignore the CPM requirement for the JZ4780. */ 374 375 (void) cpm; 376 return x1600_rtc_init(start, NULL); 377 } 378 379 void rtc_disable(void *rtc) 380 { 381 x1600_rtc_disable(rtc); 382 } 383 384 void rtc_enable(void *rtc) 385 { 386 x1600_rtc_enable(rtc); 387 } 388 389 void rtc_alarm_disable(void *rtc) 390 { 391 x1600_rtc_alarm_disable(rtc); 392 } 393 394 void rtc_alarm_enable(void *rtc) 395 { 396 x1600_rtc_alarm_enable(rtc); 397 } 398 399 uint32_t rtc_get_seconds(void *rtc) 400 { 401 return x1600_rtc_get_seconds(rtc); 402 } 403 404 void rtc_set_seconds(void *rtc, uint32_t seconds) 405 { 406 x1600_rtc_set_seconds(rtc, seconds); 407 } 408 409 uint32_t rtc_get_alarm_seconds(void *rtc) 410 { 411 return x1600_rtc_get_alarm_seconds(rtc); 412 } 413 414 void rtc_set_alarm_seconds(void *rtc, uint32_t seconds) 415 { 416 x1600_rtc_set_alarm_seconds(rtc, seconds); 417 } 418 419 void rtc_hibernate(void *rtc) 420 { 421 x1600_rtc_hibernate(rtc); 422 } 423 424 void rtc_power_down(void *rtc) 425 { 426 x1600_rtc_power_down(rtc); 427 } 428 429 void rtc_set_regulator(void *rtc, uint32_t base, uint32_t adjustment) 430 { 431 x1600_rtc_set_regulator(rtc, base, adjustment); 432 } 433 434 435 436 /* SPI adapter functions. */ 437 438 void *spi_init(l4_addr_t spi_start, l4_addr_t start, l4_addr_t end, void *cpm) 439 { 440 return jz4780_spi_init(spi_start, start, end, cpm); 441 } 442 443 void *spi_get_channel(void *spi, uint8_t num, void *channel, uint64_t frequency, 444 void *control_chip, int control_pin, int control_alt_func) 445 { 446 void *ch = jz4780_spi_get_channel(spi, num, channel, frequency); 447 448 return spi_hybrid_get_channel(ch, control_chip, control_pin, control_alt_func); 449 } 450 451 void *spi_get_channel_gpio(uint64_t frequency, 452 void *clock_chip, int clock_pin, 453 void *data_chip, int data_pin, 454 void *enable_chip, int enable_pin, 455 void *control_chip, int control_pin) 456 { 457 void *ch = spi_gpio_get_channel(frequency, clock_chip, clock_pin, data_chip, 458 data_pin, enable_chip, enable_pin, control_chip, 459 control_pin); 460 461 return spi_hybrid_get_channel(ch, control_chip, control_pin, -1); 462 } 463 464 void spi_acquire_control(void *channel, int level) 465 { 466 spi_hybrid_acquire_control(channel, level); 467 } 468 469 void spi_release_control(void *channel) 470 { 471 spi_hybrid_release_control(channel); 472 } 473 474 void spi_send(void *channel, uint32_t bytes, const uint8_t data[]) 475 { 476 spi_hybrid_send(channel, bytes, data); 477 } 478 479 void spi_send_units(void *channel, uint32_t bytes, const uint8_t data[], 480 uint8_t unit_size, uint8_t char_size, int big_endian) 481 { 482 spi_hybrid_send_units(channel, bytes, data, unit_size, char_size, big_endian); 483 } 484 485 uint32_t spi_transfer(void *channel, l4_addr_t vaddr, 486 l4re_dma_space_dma_addr_t paddr, uint32_t count, 487 uint8_t unit_size, uint8_t char_size, 488 l4_addr_t desc_vaddr, l4re_dma_space_dma_addr_t desc_paddr) 489 { 490 return spi_hybrid_transfer_descriptor(channel, vaddr, paddr, count, unit_size, 491 char_size, desc_vaddr, desc_paddr); 492 } 493 494 495 496 /* TCU adapter functions. */ 497 498 void *tcu_init(l4_addr_t start, l4_addr_t end) 499 { 500 return jz4780_tcu_init(start, end); 501 } 502 503 void *tcu_get_channel(void *tcu, uint8_t channel, l4_cap_idx_t irq) 504 { 505 return jz4780_tcu_get_channel(tcu, channel, irq); 506 } 507 508 void tcu_disable(void *tcu_channel) 509 { 510 jz4780_tcu_disable(tcu_channel); 511 } 512 513 void tcu_enable(void *tcu_channel) 514 { 515 jz4780_tcu_enable(tcu_channel); 516 } 517 518 int tcu_is_enabled(void *tcu_channel) 519 { 520 return jz4780_tcu_is_enabled(tcu_channel); 521 } 522 523 uint8_t tcu_get_clock(void *tcu_channel) 524 { 525 return jz4780_tcu_get_clock(tcu_channel); 526 } 527 528 void tcu_set_clock(void *tcu_channel, uint8_t clock) 529 { 530 jz4780_tcu_set_clock(tcu_channel, clock); 531 } 532 533 uint32_t tcu_get_prescale(void *tcu_channel) 534 { 535 return jz4780_tcu_get_prescale(tcu_channel); 536 } 537 538 void tcu_set_prescale(void *tcu_channel, uint32_t prescale) 539 { 540 jz4780_tcu_set_prescale(tcu_channel, prescale); 541 } 542 543 uint32_t tcu_get_counter(void *tcu_channel) 544 { 545 return jz4780_tcu_get_counter(tcu_channel); 546 } 547 548 void tcu_set_counter(void *tcu_channel, uint32_t value) 549 { 550 jz4780_tcu_set_counter(tcu_channel, value); 551 } 552 553 uint8_t tcu_get_count_mode(void *tcu_channel) 554 { 555 return jz4780_tcu_get_count_mode(tcu_channel); 556 } 557 558 void tcu_set_count_mode(void *tcu_channel, uint8_t mode) 559 { 560 jz4780_tcu_set_count_mode(tcu_channel, mode); 561 } 562 563 uint32_t tcu_get_full_data_value(void *tcu_channel) 564 { 565 return jz4780_tcu_get_full_data_value(tcu_channel); 566 } 567 568 void tcu_set_full_data_value(void *tcu_channel, uint32_t value) 569 { 570 jz4780_tcu_set_full_data_value(tcu_channel, value); 571 } 572 573 uint32_t tcu_get_half_data_value(void *tcu_channel) 574 { 575 return jz4780_tcu_get_half_data_value(tcu_channel); 576 } 577 578 void tcu_set_half_data_value(void *tcu_channel, uint32_t value) 579 { 580 jz4780_tcu_set_half_data_value(tcu_channel, value); 581 } 582 583 int tcu_get_full_data_mask(void *tcu_channel) 584 { 585 return jz4780_tcu_get_full_data_mask(tcu_channel); 586 } 587 588 void tcu_set_full_data_mask(void *tcu_channel, int masked) 589 { 590 jz4780_tcu_set_full_data_mask(tcu_channel, masked); 591 } 592 593 int tcu_get_half_data_mask(void *tcu_channel) 594 { 595 return jz4780_tcu_get_half_data_mask(tcu_channel); 596 } 597 598 void tcu_set_half_data_mask(void *tcu_channel, int masked) 599 { 600 jz4780_tcu_set_half_data_mask(tcu_channel, masked); 601 } 602 603 int tcu_have_interrupt(void *tcu_channel) 604 { 605 return jz4780_tcu_have_interrupt(tcu_channel); 606 } 607 608 int tcu_wait_for_irq(void *tcu_channel, uint32_t timeout) 609 { 610 return jz4780_tcu_wait_for_irq(tcu_channel, timeout); 611 } 612 613 614 615 /* Memory regions. */ 616 617 const char *io_memory_regions[] = { 618 [AIC] = "jz4780-aic", 619 [CPM] = "jz4780-cpm", 620 [DMA] = "jz4780-dma", 621 [GPIO] = "jz4780-gpio", 622 [I2C] = "jz4780-i2c", 623 [MSC] = "jz4780-msc", 624 [RTC] = "jz4780-rtc", 625 [SSI] = "jz4780-ssi", 626 [TCU] = "jz4780-tcu", 627 }; 628 629 630 631 /* AIC definitions. */ 632 633 void *aic_channels[] = {NULL, NULL}; 634 635 const unsigned int num_aic_channels = 2; 636 637 l4_cap_idx_t aic_irqs[] = {L4_INVALID_CAP}; 638 639 640 641 /* CPM definitions. */ 642 643 struct clock_info clocks[] = { 644 {"ext", Clock_external, "EXCLK"}, 645 {"ext_512", Clock_external_div_512, "EXCLK/512"}, 646 {"rtc_ext", Clock_rtc_external, "RTCLK"}, 647 {"plla", Clock_pll_A, "PLL A"}, 648 {"plle", Clock_pll_E, "PLL E"}, 649 {"pllm", Clock_pll_M, "PLL M"}, 650 {"pllv", Clock_pll_V, "PLL V"}, 651 {"main", Clock_main, "Main (SCLK_A)"}, 652 {"cpu", Clock_cpu, "CPU"}, 653 {"l2c", Clock_l2cache, "L2 cache"}, 654 {"h2p", Clock_hclock2_pclock, "AHB2/APB"}, 655 {"ahb0", Clock_hclock0, "AHB0"}, 656 {"ahb2", Clock_hclock2, "AHB2"}, 657 {"apb", Clock_pclock, "APB"}, 658 {"dma", Clock_dma, "DMA"}, 659 {"hdmi", Clock_lcd, "HDMI"}, 660 {"lcd", Clock_lcd, "LCD"}, 661 {"lcd0", Clock_lcd_pixel0, "LCD0 pixel"}, 662 {"lcd1", Clock_lcd_pixel1, "LCD1 pixel"}, 663 {"msc", Clock_msc, "MSC"}, 664 {"msc0", Clock_msc0, "MSC0"}, 665 {"msc1", Clock_msc1, "MSC1"}, 666 {"msc2", Clock_msc1, "MSC2"}, 667 {"otg0", Clock_otg0, "USB OTG0"}, 668 {"otg1", Clock_otg1, "USB OTG1"}, 669 {"i2c0", Clock_i2c0, "I2C0"}, 670 {"i2c1", Clock_i2c1, "I2C1"}, 671 {"i2c2", Clock_i2c2, "I2C2"}, 672 {"i2c3", Clock_i2c3, "I2C3"}, 673 {"i2c4", Clock_i2c4, "I2C4"}, 674 {"i2s0", Clock_i2s0, "I2S0"}, 675 {"i2s1", Clock_i2s1, "I2S1"}, 676 {"pcm", Clock_pcm, "PCM"}, 677 {"rtc", Clock_rtc, "RTC"}, 678 {"ssi", Clock_ssi, "SSI"}, 679 {"ssi0", Clock_ssi0, "SSI0"}, 680 {"ssi1", Clock_ssi1, "SSI1"}, 681 {"uart0", Clock_uart0, "UART0"}, 682 {"uart1", Clock_uart1, "UART1"}, 683 {"uart2", Clock_uart2, "UART2"}, 684 {"uart3", Clock_uart3, "UART3"}, 685 {"uart4", Clock_uart4, "UART4"}, 686 {"usbphy", Clock_usb_phy, "USB PHY"}, 687 {NULL, Clock_none, NULL}, 688 }; 689 690 691 692 /* DMA definitions. */ 693 694 void *dma_channels[32] = {NULL}; 695 696 const unsigned int num_dma_channels = 32; 697 698 struct dma_region dma_regions[8]; 699 700 const unsigned int num_dma_regions = 8; 701 702 l4_cap_idx_t dma_irq = L4_INVALID_CAP; 703 704 705 706 /* GPIO definitions. */ 707 708 struct gpio_port gpio_ports[] = { 709 {0x3fff00ff, 0x00000000}, 710 {0xfff0f3fc, 0x000f0c03}, 711 {0x0fffffff, 0x00000000}, 712 {0xffff4fff, 0x0000b000}, 713 {0xf0fff37c, 0x00000483}, 714 {0x7fa7f00f, 0x00580ff0}, 715 }; 716 717 const unsigned int num_gpio_ports = 6; 718 719 const char gpio_port_labels[] = "ABCDEF"; 720 721 722 723 /* I2C definitions. */ 724 725 void *i2c_channels[] = {NULL, NULL, NULL, NULL, NULL}; 726 727 const unsigned int num_i2c_channels = 5; 728 729 l4_cap_idx_t i2c_irqs[] = {L4_INVALID_CAP, L4_INVALID_CAP}; 730 731 732 733 /* MSC definitions. */ 734 735 void *msc_channels[] = {NULL, NULL, NULL}; 736 737 const unsigned int num_msc_channels = 3; 738 739 l4_cap_idx_t msc_irqs[] = {L4_INVALID_CAP, L4_INVALID_CAP, L4_INVALID_CAP}; 740 741 742 743 /* SPI definitions. */ 744 745 void *spi_channels[] = {NULL, NULL}; 746 747 const unsigned int num_spi_channels = 2; 748 749 750 751 /* TCU definitions. */ 752 753 void *tcu_channels[] = {NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL}; 754 755 const unsigned int num_tcu_channels = 8; 756 757 l4_cap_idx_t tcu_irq = L4_INVALID_CAP;