1 /* 2 * Access various peripherals on a board using the X1600. 3 * 4 * Copyright (C) 2023 Paul Boddie <paul@boddie.org.uk> 5 * 6 * This program is free software; you can redistribute it and/or 7 * modify it under the terms of the GNU General Public License as 8 * published by the Free Software Foundation; either version 2 of 9 * the License, or (at your option) any later version. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 * GNU General Public License for more details. 15 * 16 * You should have received a copy of the GNU General Public License 17 * along with this program; if not, write to the Free Software 18 * Foundation, Inc., 51 Franklin Street, Fifth Floor, 19 * Boston, MA 02110-1301, USA 20 */ 21 22 #include <l4/devices/aic-x1600.h> 23 #include <l4/devices/cpm-x1600.h> 24 #include <l4/devices/dma-x1600.h> 25 #include <l4/devices/gpio-x1600.h> 26 #include <l4/devices/i2c-x1600.h> 27 #include <l4/devices/rtc-x1600.h> 28 #include <l4/devices/spi-gpio.h> 29 #include <l4/devices/spi-hybrid.h> 30 #include <l4/devices/spi-jz4780.h> 31 #include "common.h" 32 33 34 35 /* AIC adapter functions. */ 36 37 void *aic_init(l4_addr_t aic_start, l4_addr_t start, l4_addr_t end, void *cpm) 38 { 39 return x1600_aic_init(aic_start, start, end, cpm); 40 } 41 42 void *aic_get_channel(void *aic, int num, void *channel) 43 { 44 return x1600_aic_get_channel(aic, num, channel); 45 } 46 47 unsigned int aic_transfer(void *channel, l4re_dma_space_dma_addr_t paddr, 48 uint32_t count, uint32_t sample_rate, 49 uint8_t sample_size) 50 { 51 return x1600_aic_transfer(channel, paddr, count, sample_rate, sample_size); 52 } 53 54 55 56 /* CPM adapter functions. */ 57 58 void *cpm_init(l4_addr_t cpm_base) 59 { 60 return x1600_cpm_init(cpm_base); 61 } 62 63 const char *cpm_clock_type(void *cpm, enum Clock_identifiers clock) 64 { 65 return x1600_cpm_clock_type(cpm, clock); 66 } 67 68 int cpm_have_clock(void *cpm, enum Clock_identifiers clock) 69 { 70 return x1600_cpm_have_clock(cpm, clock); 71 } 72 73 void cpm_start_clock(void *cpm, enum Clock_identifiers clock) 74 { 75 x1600_cpm_start_clock(cpm, clock); 76 } 77 78 void cpm_stop_clock(void *cpm, enum Clock_identifiers clock) 79 { 80 x1600_cpm_stop_clock(cpm, clock); 81 } 82 83 int cpm_get_parameters(void *cpm, enum Clock_identifiers clock, 84 uint32_t parameters[]) 85 { 86 return x1600_cpm_get_parameters(cpm, clock, parameters); 87 } 88 89 int cpm_set_parameters(void *cpm, enum Clock_identifiers clock, 90 int num_parameters, uint32_t parameters[]) 91 { 92 return x1600_cpm_set_parameters(cpm, clock, num_parameters, parameters); 93 } 94 95 uint8_t cpm_get_source(void *cpm, enum Clock_identifiers clock) 96 { 97 return x1600_cpm_get_source(cpm, clock); 98 } 99 100 void cpm_set_source(void *cpm, enum Clock_identifiers clock, uint8_t source) 101 { 102 x1600_cpm_set_source(cpm, clock, source); 103 } 104 105 enum Clock_identifiers cpm_get_source_clock(void *cpm, enum Clock_identifiers clock) 106 { 107 return x1600_cpm_get_source_clock(cpm, clock); 108 } 109 110 void cpm_set_source_clock(void *cpm, enum Clock_identifiers clock, enum Clock_identifiers source) 111 { 112 x1600_cpm_set_source_clock(cpm, clock, source); 113 } 114 115 uint64_t cpm_get_source_frequency(void *cpm, enum Clock_identifiers clock) 116 { 117 return x1600_cpm_get_source_frequency(cpm, clock); 118 } 119 120 uint64_t cpm_get_frequency(void *cpm, enum Clock_identifiers clock) 121 { 122 return x1600_cpm_get_frequency(cpm, clock); 123 } 124 125 int cpm_set_frequency(void *cpm, enum Clock_identifiers clock, uint64_t frequency) 126 { 127 return x1600_cpm_set_frequency(cpm, clock, frequency); 128 } 129 130 131 132 /* DMA adapter functions. */ 133 134 void *dma_init(l4_addr_t start, l4_addr_t end, void *cpm) 135 { 136 return x1600_dma_init(start, end, cpm); 137 } 138 139 void dma_disable(void *dma_chip) 140 { 141 x1600_dma_disable(dma_chip); 142 } 143 144 void dma_enable(void *dma_chip) 145 { 146 x1600_dma_enable(dma_chip); 147 } 148 149 void *dma_get_channel(void *dma, uint8_t channel, l4_cap_idx_t irq) 150 { 151 return x1600_dma_get_channel(dma, channel, irq); 152 } 153 154 unsigned int dma_transfer(void *dma_channel, 155 uint32_t source, uint32_t destination, 156 unsigned int count, 157 int source_increment, int destination_increment, 158 uint8_t source_width, uint8_t destination_width, 159 uint8_t transfer_unit_size, 160 int type) 161 { 162 return x1600_dma_transfer(dma_channel, source, destination, count, 163 source_increment, destination_increment, 164 source_width, destination_width, 165 transfer_unit_size, type); 166 } 167 168 unsigned int dma_wait(void *dma_channel) 169 { 170 return x1600_dma_wait(dma_channel); 171 } 172 173 174 175 /* GPIO adapter functions. */ 176 177 void *gpio_init(l4_addr_t start, l4_addr_t end, unsigned pins, 178 l4_uint32_t pull_ups, l4_uint32_t pull_downs) 179 { 180 return x1600_gpio_init(start, end, pins, pull_ups, pull_downs); 181 } 182 183 void gpio_setup(void *gpio, unsigned pin, unsigned mode, int value) 184 { 185 x1600_gpio_setup(gpio, pin, mode, value); 186 } 187 188 void gpio_config_pull(void *gpio, unsigned pin, unsigned mode) 189 { 190 x1600_gpio_config_pull(gpio, pin, mode); 191 } 192 193 void gpio_config_pad(void *gpio, unsigned pin, unsigned func, unsigned value) 194 { 195 x1600_gpio_config_pad(gpio, pin, func, value); 196 } 197 198 void gpio_config_get(void *gpio, unsigned pin, unsigned reg, unsigned *value) 199 { 200 x1600_gpio_config_get(gpio, pin, reg, value); 201 } 202 203 void gpio_config_pad_get(void *gpio, unsigned pin, unsigned *func, unsigned *value) 204 { 205 x1600_gpio_config_pad_get(gpio, pin, func, value); 206 } 207 208 void gpio_multi_setup(void *gpio, Pin_slice const *mask, unsigned mode, unsigned outvalues) 209 { 210 x1600_gpio_multi_setup(gpio, mask, mode, outvalues); 211 } 212 213 void gpio_multi_config_pad(void *gpio, Pin_slice const *mask, unsigned func, unsigned value) 214 { 215 x1600_gpio_multi_config_pad(gpio, mask, func, value); 216 } 217 218 void gpio_multi_set(void *gpio, Pin_slice const *mask, unsigned data) 219 { 220 x1600_gpio_multi_set(gpio, mask, data); 221 } 222 223 unsigned gpio_multi_get(void *gpio, unsigned offset) 224 { 225 return x1600_gpio_multi_get(gpio, offset); 226 } 227 228 int gpio_get(void *gpio, unsigned pin) 229 { 230 return x1600_gpio_get(gpio, pin); 231 } 232 233 void gpio_set(void *gpio, unsigned pin, int value) 234 { 235 x1600_gpio_set(gpio, pin, value); 236 } 237 238 void *gpio_get_irq(void *gpio, unsigned pin) 239 { 240 return x1600_gpio_get_irq(gpio, pin); 241 } 242 243 bool gpio_irq_set_mode(void *gpio_irq, unsigned mode) 244 { 245 return x1600_gpio_irq_set_mode(gpio_irq, mode); 246 } 247 248 249 250 /* I2C adapter functions. */ 251 252 void *i2c_init(l4_addr_t start, l4_addr_t end, void *cpm, 253 uint32_t frequency) 254 { 255 return x1600_i2c_init(start, end, cpm, frequency); 256 } 257 258 void *i2c_get_channel(void *i2c, uint8_t channel) 259 { 260 return x1600_i2c_get_channel(i2c, channel); 261 } 262 263 uint32_t i2c_get_frequency(void *i2c_channel) 264 { 265 return x1600_i2c_get_frequency(i2c_channel); 266 } 267 268 void i2c_set_target(void *i2c_channel, uint8_t addr) 269 { 270 return x1600_i2c_set_target(i2c_channel, addr); 271 } 272 273 void i2c_start_read(void *i2c_channel, uint8_t buf[], unsigned int total, 274 int stop) 275 { 276 x1600_i2c_start_read(i2c_channel, buf, total, stop); 277 } 278 279 void i2c_read(void *i2c_channel) 280 { 281 x1600_i2c_read(i2c_channel); 282 } 283 284 void i2c_start_write(void *i2c_channel, uint8_t buf[], unsigned int total, 285 int stop) 286 { 287 x1600_i2c_start_write(i2c_channel, buf, total, stop); 288 } 289 290 void i2c_write(void *i2c_channel) 291 { 292 x1600_i2c_write(i2c_channel); 293 } 294 295 int i2c_read_done(void *i2c_channel) 296 { 297 return x1600_i2c_read_done(i2c_channel); 298 } 299 300 int i2c_write_done(void *i2c_channel) 301 { 302 return x1600_i2c_write_done(i2c_channel); 303 } 304 305 unsigned int i2c_have_read(void *i2c_channel) 306 { 307 return x1600_i2c_have_read(i2c_channel); 308 } 309 310 unsigned int i2c_have_written(void *i2c_channel) 311 { 312 return x1600_i2c_have_written(i2c_channel); 313 } 314 315 int i2c_failed(void *i2c_channel) 316 { 317 return x1600_i2c_failed(i2c_channel); 318 } 319 320 void i2c_stop(void *i2c_channel) 321 { 322 x1600_i2c_stop(i2c_channel); 323 } 324 325 326 327 /* RTC adapter functions. */ 328 329 void *rtc_init(l4_addr_t start, void *cpm) 330 { 331 return x1600_rtc_init(start, cpm); 332 } 333 334 void rtc_disable(void *rtc) 335 { 336 x1600_rtc_disable(rtc); 337 } 338 339 void rtc_enable(void *rtc) 340 { 341 x1600_rtc_enable(rtc); 342 } 343 344 void rtc_alarm_disable(void *rtc) 345 { 346 x1600_rtc_alarm_disable(rtc); 347 } 348 349 void rtc_alarm_enable(void *rtc) 350 { 351 x1600_rtc_alarm_enable(rtc); 352 } 353 354 uint32_t rtc_get_seconds(void *rtc) 355 { 356 return x1600_rtc_get_seconds(rtc); 357 } 358 359 void rtc_set_seconds(void *rtc, uint32_t seconds) 360 { 361 x1600_rtc_set_seconds(rtc, seconds); 362 } 363 364 uint32_t rtc_get_alarm_seconds(void *rtc) 365 { 366 return x1600_rtc_get_alarm_seconds(rtc); 367 } 368 369 void rtc_set_alarm_seconds(void *rtc, uint32_t seconds) 370 { 371 x1600_rtc_set_alarm_seconds(rtc, seconds); 372 } 373 374 void rtc_hibernate(void *rtc) 375 { 376 x1600_rtc_hibernate(rtc); 377 } 378 379 void rtc_power_down(void *rtc) 380 { 381 x1600_rtc_power_down(rtc); 382 } 383 384 void rtc_set_regulator(void *rtc, uint32_t base, uint32_t adjustment) 385 { 386 x1600_rtc_set_regulator(rtc, base, adjustment); 387 } 388 389 390 391 /* SPI adapter functions. */ 392 393 void *spi_init(l4_addr_t spi_start, l4_addr_t start, l4_addr_t end, void *cpm) 394 { 395 return jz4780_spi_init(spi_start, start, end, cpm); 396 } 397 398 void *spi_get_channel(void *spi, uint8_t num, void *channel, uint64_t frequency, 399 void *control_chip, int control_pin, int control_alt_func) 400 { 401 void *ch = jz4780_spi_get_channel(spi, num, channel, frequency); 402 403 return spi_hybrid_get_channel(ch, control_chip, control_pin, control_alt_func); 404 } 405 406 void *spi_get_channel_gpio(uint64_t frequency, 407 void *clock_chip, int clock_pin, 408 void *data_chip, int data_pin, 409 void *enable_chip, int enable_pin, 410 void *control_chip, int control_pin) 411 { 412 void *ch = spi_gpio_get_channel(frequency, clock_chip, clock_pin, data_chip, 413 data_pin, enable_chip, enable_pin, control_chip, 414 control_pin); 415 416 return spi_hybrid_get_channel(ch, control_chip, control_pin, -1); 417 } 418 419 void spi_acquire_control(void *channel, int level) 420 { 421 spi_hybrid_acquire_control(channel, level); 422 } 423 424 void spi_release_control(void *channel) 425 { 426 spi_hybrid_release_control(channel); 427 } 428 429 void spi_send(void *channel, uint32_t bytes, const uint8_t data[]) 430 { 431 spi_hybrid_send(channel, bytes, data); 432 } 433 434 void spi_send_units(void *channel, uint32_t bytes, const uint8_t data[], uint8_t unit_size, 435 uint8_t char_size, int big_endian) 436 { 437 spi_hybrid_send_units(channel, bytes, data, unit_size, char_size, big_endian); 438 } 439 440 uint32_t spi_transfer(void *channel, l4_addr_t vaddr, 441 l4re_dma_space_dma_addr_t paddr, uint32_t count, 442 uint8_t unit_size, uint8_t char_size, 443 l4_addr_t desc_vaddr, l4re_dma_space_dma_addr_t desc_paddr) 444 { 445 return spi_hybrid_transfer_descriptor(channel, vaddr, paddr, count, unit_size, 446 char_size, desc_vaddr, desc_paddr); 447 } 448 449 450 451 /* Memory regions. */ 452 453 const char *io_memory_regions[] = { 454 [AIC] = "x1600-aic", 455 [CPM] = "x1600-cpm", 456 [DMA] = "x1600-dma", 457 [GPIO] = "x1600-gpio", 458 [I2C] = "x1600-i2c", 459 [RTC] = "x1600-rtc", 460 [SSI] = "x1600-ssi", 461 }; 462 463 464 465 /* AIC definitions. */ 466 467 void *aic_channels[] = {NULL}; 468 469 const unsigned int num_aic_channels = 1; 470 471 l4_cap_idx_t aic_irqs[] = {L4_INVALID_CAP}; 472 473 474 475 /* CPM definitions. */ 476 477 struct clock_info clocks[] = { 478 {"ext", Clock_external, "EXCLK"}, 479 {"ext_512", Clock_external_div_512, "EXCLK/512"}, 480 {"rtc_ext", Clock_rtc_external, "RTCLK"}, 481 {"plla", Clock_pll_A, "PLL A"}, 482 {"plle", Clock_pll_E, "PLL E"}, 483 {"pllm", Clock_pll_M, "PLL M"}, 484 {"main", Clock_main, "Main (SCLK_A)"}, 485 {"cpu", Clock_cpu, "CPU"}, 486 {"l2c", Clock_l2cache, "L2 cache"}, 487 {"ahb0", Clock_hclock0, "AHB0"}, 488 {"ahb2", Clock_hclock2, "AHB2"}, 489 {"apb", Clock_pclock, "APB"}, 490 {"aic", Clock_aic, "AIC"}, 491 {"dma", Clock_dma, "DMA"}, 492 {"lcd0", Clock_lcd_pixel0, "LCD pixel"}, 493 {"msc0", Clock_msc0, "MSC0"}, 494 {"msc1", Clock_msc1, "MSC1"}, 495 {"otg", Clock_otg0, "USB OTG"}, 496 {"i2c0", Clock_i2c0, "I2C0"}, 497 {"i2c1", Clock_i2c1, "I2C1"}, 498 {"i2s0", Clock_i2s0, "I2S0"}, 499 {"i2s1", Clock_i2s1, "I2S1"}, 500 {"i2s0r", Clock_i2s0_rx, "I2S0 RX"}, 501 {"i2s0t", Clock_i2s0_tx, "I2S0 TX"}, 502 {"rtc", Clock_rtc, "RTC"}, 503 {"ssi0", Clock_ssi0, "SSI"}, 504 {"uart0", Clock_uart0, "UART0"}, 505 {"uart1", Clock_uart1, "UART1"}, 506 {"uart2", Clock_uart2, "UART2"}, 507 {"uart3", Clock_uart3, "UART3"}, 508 {NULL, Clock_undefined, NULL}, 509 }; 510 511 512 513 /* DMA definitions. */ 514 515 void *dma_channels[32] = {NULL}; 516 517 const unsigned int num_dma_channels = 32; 518 519 struct dma_region dma_regions[8]; 520 521 const unsigned int num_dma_regions = 8; 522 523 l4_cap_idx_t dma_irq = L4_INVALID_CAP; 524 525 526 527 /* GPIO definitions. */ 528 529 struct gpio_port gpio_ports[] = { 530 {0xffffffff, 0x00000000}, 531 {0xdffbf7bf, 0x00000000}, 532 {0x987e0000, 0x07000007}, 533 {0x0000003f, 0x00000000} 534 }; 535 536 const unsigned int num_gpio_ports = 4; 537 538 const char gpio_port_labels[] = "ABCD"; 539 540 541 542 /* I2C definitions. */ 543 544 void *i2c_channels[] = {NULL, NULL}; 545 546 const unsigned int num_i2c_channels = 2; 547 548 l4_cap_idx_t i2c_irqs[] = {L4_INVALID_CAP, L4_INVALID_CAP}; 549 550 551 552 /* SPI definitions. */ 553 554 void *spi_channels[] = {NULL}; 555 556 const unsigned int num_spi_channels = 1;