# HG changeset patch # User Paul Boddie # Date 1613519327 -3600 # Node ID 5e02ce0315af7b636579826902214f8b7fcae29e # Parent 55b925ad06ef02f2ed75a3fac64d9d2cbe2597fa Added some measurements to investigate peripheral behaviour. diff -r 55b925ad06ef -r 5e02ce0315af pkg/devices/lib/i2c/include/i2c-jz4730.h --- a/pkg/devices/lib/i2c/include/i2c-jz4730.h Tue Feb 16 22:53:31 2021 +0100 +++ b/pkg/devices/lib/i2c/include/i2c-jz4730.h Wed Feb 17 00:48:47 2021 +0100 @@ -67,6 +67,12 @@ unsigned int read(uint8_t address, uint8_t buf[], unsigned int length); unsigned int write(uint8_t address, uint8_t buf[], unsigned int length); + // Statistics. + + unsigned int start_not_possible = 0, read_not_ready = 0, read_not_ready_clear = 0, read_not_ready_stx = 0, + read_not_possible = 0, read_nack = 0, read_complete = 0, + write_not_possible = 0, write_complete = 0, total_reads = 0; + protected: void set_frequency(); @@ -144,4 +150,24 @@ unsigned int jz4730_i2c_write(void *i2c_channel, uint8_t address, uint8_t buf[], unsigned int length); +unsigned int jz4730_i2c_start_not_possible(void *i2c_channel); + +unsigned int jz4730_i2c_read_not_ready(void *i2c_channel); + +unsigned int jz4730_i2c_read_not_ready_clear(void *i2c_channel); + +unsigned int jz4730_i2c_read_not_ready_stx(void *i2c_channel); + +unsigned int jz4730_i2c_read_not_possible(void *i2c_channel); + +unsigned int jz4730_i2c_read_nack(void *i2c_channel); + +unsigned int jz4730_i2c_read_complete(void *i2c_channel); + +unsigned int jz4730_i2c_write_not_possible(void *i2c_channel); + +unsigned int jz4730_i2c_write_complete(void *i2c_channel); + +unsigned int jz4730_i2c_total_reads(void *i2c_channel); + EXTERN_C_END diff -r 55b925ad06ef -r 5e02ce0315af pkg/devices/lib/i2c/src/jz4730.cc --- a/pkg/devices/lib/i2c/src/jz4730.cc Tue Feb 16 22:53:31 2021 +0100 +++ b/pkg/devices/lib/i2c/src/jz4730.cc Wed Feb 17 00:48:47 2021 +0100 @@ -139,11 +139,11 @@ I2c_jz4730_channel::communicate() { enum I2c_jz4730_state state = I2c_jz4730_pre_start; - _limit = 10; + _limit = 1; do { - wait_for_irq(1000); + wait_for_irq(100000); switch (state) { @@ -186,14 +186,17 @@ if (busy()) { if (!(--_limit)) + { + start_not_possible++; return I2c_jz4730_end; + } else return I2c_jz4730_pre_start; } // Use a longer time limit in subsequent activities. - _limit = 1000; + _limit = 1; // Start, send address, proceed to the operation. @@ -214,7 +217,14 @@ // Wait again if not ready to read. if (transferring() || (!data_valid() && !nack())) + { + read_not_ready++; + if (transferring()) + read_not_ready_stx++; + else + read_not_ready_clear++; return I2c_jz4730_start_read; + } return I2c_jz4730_perform_read; } @@ -230,6 +240,7 @@ { if (!(--_limit)) { + read_not_possible++; stop(); return I2c_jz4730_end; } @@ -241,6 +252,7 @@ if (nack()) { + read_nack++; stop(); return I2c_jz4730_end; } @@ -259,13 +271,14 @@ if (_nread >= _length) { + read_complete++; stop(); return I2c_jz4730_end; } // Wait for more data otherwise. - _limit = 1000; + _limit = 1; return I2c_jz4730_perform_read; } @@ -280,6 +293,7 @@ { if (!(--_limit)) { + write_not_possible++; stop(); return I2c_jz4730_end; } @@ -291,8 +305,9 @@ if ((_nwritten >= _length) || nack()) { + write_complete++; stop(); - _limit = 1000; + _limit = 1; return I2c_jz4730_stop_write; } @@ -303,7 +318,7 @@ // Wait for the data to be sent. - _limit = 1000; + _limit = 1; return I2c_jz4730_perform_write; } @@ -340,6 +355,7 @@ _address = address; _buf = &buf[0]; _read = true; + total_reads++; communicate(); @@ -497,3 +513,33 @@ { return static_cast(i2c_channel)->write(address, buf, length); } + +unsigned int jz4730_i2c_start_not_possible(void *i2c_channel) +{ return reinterpret_cast(i2c_channel)->start_not_possible; } + +unsigned int jz4730_i2c_read_not_ready(void *i2c_channel) +{ return reinterpret_cast(i2c_channel)->read_not_ready; } + +unsigned int jz4730_i2c_read_not_ready_clear(void *i2c_channel) +{ return reinterpret_cast(i2c_channel)->read_not_ready_clear; } + +unsigned int jz4730_i2c_read_not_ready_stx(void *i2c_channel) +{ return reinterpret_cast(i2c_channel)->read_not_ready_stx; } + +unsigned int jz4730_i2c_read_not_possible(void *i2c_channel) +{ return reinterpret_cast(i2c_channel)->read_not_possible; } + +unsigned int jz4730_i2c_read_nack(void *i2c_channel) +{ return reinterpret_cast(i2c_channel)->read_nack; } + +unsigned int jz4730_i2c_read_complete(void *i2c_channel) +{ return reinterpret_cast(i2c_channel)->read_complete; } + +unsigned int jz4730_i2c_write_not_possible(void *i2c_channel) +{ return reinterpret_cast(i2c_channel)->write_not_possible; } + +unsigned int jz4730_i2c_write_complete(void *i2c_channel) +{ return reinterpret_cast(i2c_channel)->write_complete; } + +unsigned int jz4730_i2c_total_reads(void *i2c_channel) +{ return reinterpret_cast(i2c_channel)->total_reads; } diff -r 55b925ad06ef -r 5e02ce0315af pkg/landfall-examples/letux400_i2c/letux400_i2c.cc --- a/pkg/landfall-examples/letux400_i2c/letux400_i2c.cc Tue Feb 16 22:53:31 2021 +0100 +++ b/pkg/landfall-examples/letux400_i2c/letux400_i2c.cc Wed Feb 17 00:48:47 2021 +0100 @@ -258,6 +258,22 @@ sleep(5); } + printf("start_not_possible = %d\n" + "read_not_ready = %d\n" + "read_not_ready_clear = %d\n" + "read_not_ready_stx = %d\n" + "read_not_possible = %d\n" + "read_nack = %d\n" + "read_complete = %d\n" + "write_not_possible = %d\n" + "write_complete = %d\n" + "total_reads = %d\n", + jz4730_i2c_start_not_possible(i2c0), jz4730_i2c_read_not_ready(i2c0), jz4730_i2c_read_not_ready_clear(i2c0), jz4730_i2c_read_not_ready_stx(i2c0), + jz4730_i2c_read_not_possible(i2c0), jz4730_i2c_read_nack(i2c0), jz4730_i2c_read_complete(i2c0), + jz4730_i2c_write_not_possible(i2c0), jz4730_i2c_write_complete(i2c0), jz4730_i2c_total_reads(i2c0)); + + sleep(30); + /* Issue a shutdown request. */ buf[0] = 0xd8; buf[1] = 1;