# HG changeset patch
# User Paul Boddie <paul@boddie.org.uk>
# Date 1697302027 -7200
# Node ID ccc779d8266136e8e0a5838530fba772242255c2
# Parent  866e69a975e7be3590c2350ba56c6966c0f5697f
Somehow made the peripheral work for once.

diff -r 866e69a975e7 -r ccc779d82661 pkg/devices/lib/i2c/src/x1600.cc
--- a/pkg/devices/lib/i2c/src/x1600.cc	Sat Oct 14 01:56:53 2023 +0200
+++ b/pkg/devices/lib/i2c/src/x1600.cc	Sat Oct 14 18:47:07 2023 +0200
@@ -26,8 +26,6 @@
 #include <l4/util/util.h>
 #include <sys/time.h>
 
-#include <stdio.h>
-
 /* NOTE: This peripheral is very similar to the JZ4780 with the registers
          renamed to I2C from SMB, with a few high speed registers added, and
          with I2C_SDAHD appearing at a different location. */
@@ -173,12 +171,6 @@
 : _cpm(cpm), _frequency(frequency)
 {
   _regs = new Hw::Mmio_register_block<32>(start);
-
-  // NOTE: Previously located in set_target.
-
-  disable();
-  set_frequency();
-  enable();
 }
 
 // Enable the channel.
@@ -236,8 +228,6 @@
                        I2c_enable_restart |
                        I2c_enable_master;
 
-  printf("I2c_control = %02x\n", (uint32_t) _regs[I2c_control]);
-
   // According to the programming manual, if the PCLK period is T{I2C_DEV_CLK}
   // then the I2C clock period is...
 
@@ -340,9 +330,6 @@
   _regs[low_reg] = low_count < 8 ? 8 : low_count;
   _regs[high_reg] = high_count < 6 ? 6 : high_count;
 
-  //printf("low_count: %d\n", low_count);
-  //printf("high_count: %d\n", high_count);
-
   // Data hold and setup times:
 
   //              Standard  Fast    High
@@ -366,9 +353,6 @@
                                : (hold_count < (int) I2c_hold_mask ? (uint32_t) hold_count
                                                                    : I2c_hold_mask));
 
-  //printf("i2c_dev_clk: %d\n", i2c_dev_clk);
-  //printf("SDA hold: %x\n", hold_count);
-
   // I2C_SDASU is apparently not used in master mode.
 
   // T{delay} = (I2CSDASU - 1) * T{I2C_DEV_CLK}
@@ -392,14 +376,11 @@
 void
 I2c_x1600_channel::set_target(uint8_t address)
 {
-  //printf("set_target: %x\n", address);
+  disable();
+  set_frequency();
   _regs[I2c_target_address] = address & I2c_target_7bits;
   init_parameters();
-  //printf("I2c_enable_status: %x\n", (uint32_t) _regs[I2c_enable_status]);
-  //printf("I2c_status: %x\n", (uint32_t) _regs[I2c_status]);
-  //printf("Int_mask: %x\n", (uint32_t) _regs[Int_mask]);
-  //printf("Int_status: %x\n", (uint32_t) _regs[Int_status]);
-  //printf("Int_raw_status: %x\n", (uint32_t) _regs[Int_raw_status]);
+  enable();
 }
 
 
@@ -537,7 +518,6 @@
   while (can_queue && can_send())
   {
     uint32_t stop = _stop && (_reqpos == _total - 1) ? I2c_command_stop : I2c_command_no_stop;
-    printf("Queue read %d/%d %s\n", _reqpos, _total - 1, stop ? "stop" : "continue");
 
     _regs[I2c_data_command] = I2c_command_read | stop;
     _reqpos++;
@@ -560,21 +540,16 @@
   if (remaining < can_queue)
     can_queue = remaining;
 
-  printf("queue_writes: %d %s\n", can_queue, can_send() ? "can send" : "cannot send");
-
   // Queue write requests for any remaining queue entries.
 
   while (can_queue && can_send())
   {
     uint32_t stop = _stop && (_reqpos == _total - 1) ? I2c_command_stop : I2c_command_no_stop;
-    printf("Queue write %d/%d %s\n", _reqpos, _total - 1, stop ? "stop" : "continue");
 
     _regs[I2c_data_command] = I2c_command_write | _buf[_reqpos] | stop;
     _reqpos++;
     can_queue--;
   }
-
-  printf("Tx_fifo_count = %d\n", (uint32_t) _regs[Tx_fifo_count]);
 }
 
 // Store read command results from the queue.
@@ -582,8 +557,6 @@
 void
 I2c_x1600_channel::store_reads()
 {
-  printf("store_reads: %s\n", have_input() ? "input" : "no input");
-
   // Read any input and store it in the buffer.
 
   while (have_input() && (_pos < _reqpos))
@@ -604,7 +577,6 @@
   // Read all expected.
 
   _regs[Rx_fifo_thold] = queued - 1;
-  printf("Rx_fifo_thold = %d\n", (uint32_t) _regs[Rx_fifo_thold]);
 }
 
 // Read from the target device.
@@ -619,10 +591,6 @@
   _fail = 0;
   _stop = stop;
 
-  printf("Int_raw_status: %x\n", (uint32_t) _regs[Int_raw_status]);
-  printf("Trans_abort_status: %x\n", (uint32_t) _regs[Trans_abort_status]);
-  printf("start_read: %d\n", total);
-
   reset_flags();
 
   _regs[Int_mask] = Int_rx_full | // read condition (reading needed)
@@ -637,16 +605,14 @@
 void
 I2c_x1600_channel::read()
 {
-  printf("Rx_fifo_count = %d\n", (uint32_t) _regs[Rx_fifo_count]);
-  printf("Int_raw_status: %x\n", (uint32_t) _regs[Int_raw_status]);
-  printf("Trans_abort_status: %x\n", (uint32_t) _regs[Trans_abort_status]);
-
   // Test for the general transfer abort condition.
 
   if (read_failed() || write_failed())
   {
     _fail = 1;
     _regs[Int_mask] = 0;
+    disable();
+    enable();
     return;
   }
 
@@ -669,10 +635,6 @@
   _fail = 0;
   _stop = stop;
 
-  printf("Int_raw_status: %x\n", (uint32_t) _regs[Int_raw_status]);
-  printf("Trans_abort_status: %x\n", (uint32_t) _regs[Trans_abort_status]);
-  printf("start_write: %d\n", total);
-
   reset_flags();
 
   // Enable interrupts for further writes.
@@ -688,14 +650,12 @@
 void
 I2c_x1600_channel::write()
 {
-  printf("Tx_fifo_count = %d\n", (uint32_t) _regs[Tx_fifo_count]);
-  printf("Int_raw_status: %x\n", (uint32_t) _regs[Int_raw_status]);
-  printf("Trans_abort_status: %x\n", (uint32_t) _regs[Trans_abort_status]);
-
   if (write_failed())
   {
     _fail = 1;
     _regs[Int_mask] = 0;
+    disable();
+    enable();
     return;
   }