# HG changeset patch
# User Paul Boddie <paul@boddie.org.uk>
# Date 1695683627 -7200
# Node ID f315dd9dbb9637cc629ebe87cdf3ae01e218db77
# Parent  aec11102da9dd20361e182eeabe5313a532dc4f7
X1600 pull-up/down registers supposedly enable pull-up/down behaviour.

diff -r aec11102da9d -r f315dd9dbb96 pkg/devices/lib/gpio/src/x1600.cc
--- a/pkg/devices/lib/gpio/src/x1600.cc	Sun Sep 24 01:53:43 2023 +0200
+++ b/pkg/devices/lib/gpio/src/x1600.cc	Tue Sep 26 01:13:47 2023 +0200
@@ -86,15 +86,15 @@
 
   // Only the following registers differ from the JZ4780. The dual-edge
   // registers being added to the X1600, with the pull-up/down registers being
-  // relocated.
+  // relocated and their sense changed from disable to enable.
 
   Pull_edge           = 0x070,  // PxEDG
   Pull_edge_set       = 0x074,  // PxEDGS
   Pull_edge_clear     = 0x078,  // PxEDGC
 
-  Pull_disable        = 0x080,  // PxPE
-  Pull_disable_set    = 0x084,  // PxPES
-  Pull_disable_clear  = 0x088,  // PxPEC
+  Pull_enable         = 0x080,  // PxPE
+  Pull_enable_set     = 0x084,  // PxPES
+  Pull_enable_clear   = 0x088,  // PxPEC
 
   // The shadow port Z is available at offset 0x700 and supports the INTS, INTC,
   // MSKS, MSKC, PAT1S, PAT1C, PAT0S, PAT0C registers, along with the following.
@@ -310,15 +310,15 @@
   switch (mode)
   {
     case Pull_none:
-      _regs[Pull_disable_set] = _pin_bit(pin);
+      _regs[Pull_enable_clear] = _pin_bit(pin);
       break;
     case Pull_down:
       if (_pin_bit(pin) & _pull_downs)
-        _regs[Pull_disable_clear] = _pin_bit(pin);
+        _regs[Pull_enable_set] = _pin_bit(pin);
       break;
     case Pull_up:
       if (_pin_bit(pin) & _pull_ups)
-      _regs[Pull_disable_clear] = _pin_bit(pin);
+        _regs[Pull_enable_set] = _pin_bit(pin);
       break;
     default:
       // Invalid pull-up/down mode for pin.