1.1 --- a/pkg/devices/lib/lcd/include/lcd-jz4740-regs.h Sat Jun 10 22:45:34 2023 +0200
1.2 +++ b/pkg/devices/lib/lcd/include/lcd-jz4740-regs.h Sat Jun 10 22:45:54 2023 +0200
1.3 @@ -2,8 +2,8 @@
1.4 * LCD peripheral support for the JZ4740 and related SoCs.
1.5 *
1.6 * Copyright (C) Xiangfu Liu <xiangfu@sharism.cc>
1.7 - * Copyright (C) 2015, 2016, 2017, 2018,
1.8 - * 2020 Paul Boddie <paul@boddie.org.uk>
1.9 + * Copyright (C) 2015, 2016, 2017, 2018, 2020,
1.10 + * 2021, 2022 Paul Boddie <paul@boddie.org.uk>
1.11 *
1.12 * This program is free software; you can redistribute it and/or
1.13 * modify it under the terms of the GNU General Public License as
1.14 @@ -286,6 +286,8 @@
1.15
1.16 enum Position_bits : unsigned
1.17 {
1.18 + Position_alpha_mode = 31,
1.19 + Position_rgb = 30,
1.20 Position_bpp = 27,
1.21 Position_premultiply_lcd = 26,
1.22 Position_coefficient = 24,
1.23 @@ -293,9 +295,38 @@
1.24 Position_x_position = 0,
1.25 };
1.26
1.27 -enum Position_values : unsigned
1.28 +enum Position_alpha_mode_values : unsigned
1.29 +{
1.30 + Position_alpha_image = 0,
1.31 + Position_alpha_pixel = 1,
1.32 +};
1.33 +
1.34 +enum Position_rgb_values : unsigned
1.35 +{
1.36 + Position_rgb_565 = 0,
1.37 + Position_rgb_555 = 1,
1.38 +};
1.39 +
1.40 +enum Position_bpp_values : unsigned
1.41 {
1.42 Position_bpp_15_16bpp = 4,
1.43 Position_bpp_18_24bpp = 5,
1.44 Position_bpp_30bpp = 7,
1.45 };
1.46 +
1.47 +enum Position_coefficient_values : unsigned
1.48 +{
1.49 + Position_coefficient_0 = 0,
1.50 + Position_coefficient_1 = 1,
1.51 + Position_coefficient_alpha = 2,
1.52 + Position_coefficient_1_minus_alpha = 3,
1.53 +};
1.54 +
1.55 +// Alpha and size.
1.56 +
1.57 +enum Alpha_size_bits : unsigned
1.58 +{
1.59 + Alpha_size_alpha = 24,
1.60 + Alpha_size_height = 12,
1.61 + Alpha_size_width = 0,
1.62 +};
2.1 --- a/pkg/devices/lib/lcd/include/lcd-jz4780.h Sat Jun 10 22:45:34 2023 +0200
2.2 +++ b/pkg/devices/lib/lcd/include/lcd-jz4780.h Sat Jun 10 22:45:54 2023 +0200
2.3 @@ -55,8 +55,6 @@
2.4 public:
2.5 Lcd_jz4780_chip(l4_addr_t addr, Jz4740_lcd_panel *panel);
2.6
2.7 - void enable();
2.8 -
2.9 /* Configuration. */
2.10
2.11 void config(struct Jz4740_lcd_descriptor *desc_vaddr,
3.1 --- a/pkg/devices/lib/lcd/src/jz4740/lcd-jz4740.cc Sat Jun 10 22:45:34 2023 +0200
3.2 +++ b/pkg/devices/lib/lcd/src/jz4740/lcd-jz4740.cc Sat Jun 10 22:45:54 2023 +0200
3.3 @@ -407,6 +407,8 @@
3.4 default: length = Burst_length_16; break;
3.5 }
3.6
3.7 + // NOTE: Underrun supposedly not needed.
3.8 +
3.9 return (length << Control_burst_length) | (1U << Control_out_underrun);
3.10 }
3.11
4.1 --- a/pkg/devices/lib/lcd/src/jz4740/lcd-jz4780.cc Sat Jun 10 22:45:34 2023 +0200
4.2 +++ b/pkg/devices/lib/lcd/src/jz4740/lcd-jz4780.cc Sat Jun 10 22:45:54 2023 +0200
4.3 @@ -2,8 +2,8 @@
4.4 * LCD peripheral support for the JZ4740 and related SoCs.
4.5 *
4.6 * Copyright (C) Xiangfu Liu <xiangfu@sharism.cc>
4.7 - * Copyright (C) 2015, 2016, 2017, 2018,
4.8 - * 2020 Paul Boddie <paul@boddie.org.uk>
4.9 + * Copyright (C) 2015, 2016, 2017, 2018, 2020,
4.10 + * 2021, 2022 Paul Boddie <paul@boddie.org.uk>
4.11 *
4.12 * This program is free software; you can redistribute it and/or
4.13 * modify it under the terms of the GNU General Public License as
4.14 @@ -41,13 +41,6 @@
4.15 _burst_size = 64; // 64-word burst size available in the JZ4780
4.16 }
4.17
4.18 -void
4.19 -Lcd_jz4780_chip::enable()
4.20 -{
4.21 - _regs[Osd_status] = 0;
4.22 - Lcd_jz4740_chip::enable();
4.23 -}
4.24 -
4.25 // Return an interrupt-related OSD configuration value.
4.26
4.27 uint32_t
4.28 @@ -123,12 +116,13 @@
4.29
4.30 desc.offset = 0;
4.31 desc.page_width = 0;
4.32 - desc.command_position = (1U << Position_premultiply_lcd) |
4.33 - ((frame_enable ? 1U : 3U) << Position_coefficient) |
4.34 +
4.35 + desc.command_position = (Position_coefficient_1 << Position_coefficient) |
4.36 _position_bpp();
4.37 - desc.fg_size = 0xff000000 |
4.38 - ((_panel->height - 1) << 12) |
4.39 - ((_panel->width - 1) << 0);
4.40 +
4.41 + desc.fg_size = (0xff << Alpha_size_alpha) |
4.42 + ((_panel->height - 1) << Alpha_size_height) |
4.43 + ((_panel->width - 1) << Alpha_size_width);
4.44 }
4.45
4.46 // HDMI-compatible JZ4780 configuration.
4.47 @@ -140,19 +134,18 @@
4.48 struct Jz4740_lcd_descriptor *desc_paddr,
4.49 l4_addr_t fb_paddr)
4.50 {
4.51 - // Provide the first framebuffer descriptor in single and dual modes.
4.52 - // Flip back and forth between any palette and the framebuffer.
4.53 + // Descriptor for the first DMA channel.
4.54
4.55 _set_descriptor(desc_vaddr[0], get_framebuffer(0, fb_paddr),
4.56 get_aligned_size(),
4.57 desc_paddr,
4.58 _command_irq());
4.59
4.60 - // Provide the second framebuffer descriptor only in dual-panel mode.
4.61 - // Only employ this descriptor in the second DMA channel.
4.62 + // Descriptor for the second DMA channel.
4.63 + // This just sets an inactive frame.
4.64
4.65 - _set_descriptor(desc_vaddr[1], get_framebuffer(1, fb_paddr),
4.66 - get_aligned_size(),
4.67 + _set_descriptor(desc_vaddr[1], 0,
4.68 + 0,
4.69 desc_paddr + 1,
4.70 _command_irq(),
4.71 false);
4.72 @@ -164,11 +157,11 @@
4.73
4.74 // Configure DMA by setting frame descriptor addresses.
4.75
4.76 - // Provide the palette descriptor address first, if employed.
4.77 + // Provide a descriptor for the first DMA channel.
4.78
4.79 _regs[Desc_address_0] = (uint32_t) desc_paddr;
4.80
4.81 - // Provide a descriptor for the second DMA channel, providing foreground 1.
4.82 + // Provide a descriptor for the second DMA channel, currently not used.
4.83
4.84 _regs[Desc_address_1] = (uint32_t) (desc_paddr + 1);
4.85
4.86 @@ -182,19 +175,6 @@
4.87
4.88 _regs[Lcd_control] = _control_panel() | _control_transfer() | _control_irq();
4.89 _regs[Lcd_config] = _panel->config;
4.90 -
4.91 - // JZ4780-specific configuration.
4.92 - // The RGB control register usage may be superfluous.
4.93 -
4.94 - _regs[Rgb_control] = (1U << Rgb_format_enable) | Rgb_odd_line_rgb | Rgb_even_line_rgb;
4.95 - _regs[Priority_level] = _priority_transfer();
4.96 -
4.97 - // Employ whole image alpha levels by default.
4.98 -
4.99 - _regs[Osd_config] = (1U << Osd_config_enable) |
4.100 - (1U << Osd_config_alpha_enable);
4.101 - _regs[Alpha_levels] = ((255U << Alpha_level_fg1) & Alpha_level_fg1_mask) |
4.102 - ((255U << Alpha_level_fg0) & Alpha_level_fg0_mask);
4.103 }
4.104
4.105
5.1 --- a/pkg/devices/lib/panel/src/ci20/panel-ci20.c Sat Jun 10 22:45:34 2023 +0200
5.2 +++ b/pkg/devices/lib/panel/src/ci20/panel-ci20.c Sat Jun 10 22:45:54 2023 +0200
5.3 @@ -1,7 +1,7 @@
5.4 /*
5.5 * Export a panel structure for the MIPS Creator CI20.
5.6 *
5.7 - * Copyright (C) 2018, 2020 Paul Boddie <paul@boddie.org.uk>
5.8 + * Copyright (C) 2018, 2020, 2021 Paul Boddie <paul@boddie.org.uk>
5.9 *
5.10 * This program is free software; you can redistribute it and/or
5.11 * modify it under the terms of the GNU General Public License as
5.12 @@ -27,14 +27,10 @@
5.13 Jz4740_lcd_mode_tft_generic
5.14 | Jz4740_lcd_bpp_24
5.15 | Jz4740_lcd_desc_8_word
5.16 - | Jz4740_lcd_underrun_recover
5.17 | Jz4740_lcd_ps_disabled
5.18 | Jz4740_lcd_cls_disabled
5.19 | Jz4740_lcd_spl_disabled
5.20 | Jz4740_lcd_rev_disabled
5.21 - | Jz4740_lcd_pclock_negative
5.22 - | Jz4740_lcd_hsync_positive
5.23 - | Jz4740_lcd_vsync_positive
5.24 | Jz4740_lcd_de_positive),
5.25
5.26 // NOTE: To be configured using the HDMI DDC mechanism.
6.1 --- a/tools/listlibs.sh Sat Jun 10 22:45:34 2023 +0200
6.2 +++ b/tools/listlibs.sh Sat Jun 10 22:45:54 2023 +0200
6.3 @@ -73,7 +73,7 @@
6.4 $BUILDDIR/bin
6.5 EOF
6.6 exit 1
6.7 - elif [ ! "$ARCH" ] || [ "$ARCH" = "$BASENAME" ] ; then
6.8 + elif [ ! "$ARCH" ] || [ "${ARCH}_gen" = "$BASENAME" ] ; then
6.9 ARCHDIR="$BASENAME"
6.10 break
6.11 fi