1.1 --- a/pkg/devices/lib/i2c/src/x1600.cc Sat Oct 14 01:56:53 2023 +0200
1.2 +++ b/pkg/devices/lib/i2c/src/x1600.cc Sat Oct 14 18:47:07 2023 +0200
1.3 @@ -26,8 +26,6 @@
1.4 #include <l4/util/util.h>
1.5 #include <sys/time.h>
1.6
1.7 -#include <stdio.h>
1.8 -
1.9 /* NOTE: This peripheral is very similar to the JZ4780 with the registers
1.10 renamed to I2C from SMB, with a few high speed registers added, and
1.11 with I2C_SDAHD appearing at a different location. */
1.12 @@ -173,12 +171,6 @@
1.13 : _cpm(cpm), _frequency(frequency)
1.14 {
1.15 _regs = new Hw::Mmio_register_block<32>(start);
1.16 -
1.17 - // NOTE: Previously located in set_target.
1.18 -
1.19 - disable();
1.20 - set_frequency();
1.21 - enable();
1.22 }
1.23
1.24 // Enable the channel.
1.25 @@ -236,8 +228,6 @@
1.26 I2c_enable_restart |
1.27 I2c_enable_master;
1.28
1.29 - printf("I2c_control = %02x\n", (uint32_t) _regs[I2c_control]);
1.30 -
1.31 // According to the programming manual, if the PCLK period is T{I2C_DEV_CLK}
1.32 // then the I2C clock period is...
1.33
1.34 @@ -340,9 +330,6 @@
1.35 _regs[low_reg] = low_count < 8 ? 8 : low_count;
1.36 _regs[high_reg] = high_count < 6 ? 6 : high_count;
1.37
1.38 - //printf("low_count: %d\n", low_count);
1.39 - //printf("high_count: %d\n", high_count);
1.40 -
1.41 // Data hold and setup times:
1.42
1.43 // Standard Fast High
1.44 @@ -366,9 +353,6 @@
1.45 : (hold_count < (int) I2c_hold_mask ? (uint32_t) hold_count
1.46 : I2c_hold_mask));
1.47
1.48 - //printf("i2c_dev_clk: %d\n", i2c_dev_clk);
1.49 - //printf("SDA hold: %x\n", hold_count);
1.50 -
1.51 // I2C_SDASU is apparently not used in master mode.
1.52
1.53 // T{delay} = (I2CSDASU - 1) * T{I2C_DEV_CLK}
1.54 @@ -392,14 +376,11 @@
1.55 void
1.56 I2c_x1600_channel::set_target(uint8_t address)
1.57 {
1.58 - //printf("set_target: %x\n", address);
1.59 + disable();
1.60 + set_frequency();
1.61 _regs[I2c_target_address] = address & I2c_target_7bits;
1.62 init_parameters();
1.63 - //printf("I2c_enable_status: %x\n", (uint32_t) _regs[I2c_enable_status]);
1.64 - //printf("I2c_status: %x\n", (uint32_t) _regs[I2c_status]);
1.65 - //printf("Int_mask: %x\n", (uint32_t) _regs[Int_mask]);
1.66 - //printf("Int_status: %x\n", (uint32_t) _regs[Int_status]);
1.67 - //printf("Int_raw_status: %x\n", (uint32_t) _regs[Int_raw_status]);
1.68 + enable();
1.69 }
1.70
1.71
1.72 @@ -537,7 +518,6 @@
1.73 while (can_queue && can_send())
1.74 {
1.75 uint32_t stop = _stop && (_reqpos == _total - 1) ? I2c_command_stop : I2c_command_no_stop;
1.76 - printf("Queue read %d/%d %s\n", _reqpos, _total - 1, stop ? "stop" : "continue");
1.77
1.78 _regs[I2c_data_command] = I2c_command_read | stop;
1.79 _reqpos++;
1.80 @@ -560,21 +540,16 @@
1.81 if (remaining < can_queue)
1.82 can_queue = remaining;
1.83
1.84 - printf("queue_writes: %d %s\n", can_queue, can_send() ? "can send" : "cannot send");
1.85 -
1.86 // Queue write requests for any remaining queue entries.
1.87
1.88 while (can_queue && can_send())
1.89 {
1.90 uint32_t stop = _stop && (_reqpos == _total - 1) ? I2c_command_stop : I2c_command_no_stop;
1.91 - printf("Queue write %d/%d %s\n", _reqpos, _total - 1, stop ? "stop" : "continue");
1.92
1.93 _regs[I2c_data_command] = I2c_command_write | _buf[_reqpos] | stop;
1.94 _reqpos++;
1.95 can_queue--;
1.96 }
1.97 -
1.98 - printf("Tx_fifo_count = %d\n", (uint32_t) _regs[Tx_fifo_count]);
1.99 }
1.100
1.101 // Store read command results from the queue.
1.102 @@ -582,8 +557,6 @@
1.103 void
1.104 I2c_x1600_channel::store_reads()
1.105 {
1.106 - printf("store_reads: %s\n", have_input() ? "input" : "no input");
1.107 -
1.108 // Read any input and store it in the buffer.
1.109
1.110 while (have_input() && (_pos < _reqpos))
1.111 @@ -604,7 +577,6 @@
1.112 // Read all expected.
1.113
1.114 _regs[Rx_fifo_thold] = queued - 1;
1.115 - printf("Rx_fifo_thold = %d\n", (uint32_t) _regs[Rx_fifo_thold]);
1.116 }
1.117
1.118 // Read from the target device.
1.119 @@ -619,10 +591,6 @@
1.120 _fail = 0;
1.121 _stop = stop;
1.122
1.123 - printf("Int_raw_status: %x\n", (uint32_t) _regs[Int_raw_status]);
1.124 - printf("Trans_abort_status: %x\n", (uint32_t) _regs[Trans_abort_status]);
1.125 - printf("start_read: %d\n", total);
1.126 -
1.127 reset_flags();
1.128
1.129 _regs[Int_mask] = Int_rx_full | // read condition (reading needed)
1.130 @@ -637,16 +605,14 @@
1.131 void
1.132 I2c_x1600_channel::read()
1.133 {
1.134 - printf("Rx_fifo_count = %d\n", (uint32_t) _regs[Rx_fifo_count]);
1.135 - printf("Int_raw_status: %x\n", (uint32_t) _regs[Int_raw_status]);
1.136 - printf("Trans_abort_status: %x\n", (uint32_t) _regs[Trans_abort_status]);
1.137 -
1.138 // Test for the general transfer abort condition.
1.139
1.140 if (read_failed() || write_failed())
1.141 {
1.142 _fail = 1;
1.143 _regs[Int_mask] = 0;
1.144 + disable();
1.145 + enable();
1.146 return;
1.147 }
1.148
1.149 @@ -669,10 +635,6 @@
1.150 _fail = 0;
1.151 _stop = stop;
1.152
1.153 - printf("Int_raw_status: %x\n", (uint32_t) _regs[Int_raw_status]);
1.154 - printf("Trans_abort_status: %x\n", (uint32_t) _regs[Trans_abort_status]);
1.155 - printf("start_write: %d\n", total);
1.156 -
1.157 reset_flags();
1.158
1.159 // Enable interrupts for further writes.
1.160 @@ -688,14 +650,12 @@
1.161 void
1.162 I2c_x1600_channel::write()
1.163 {
1.164 - printf("Tx_fifo_count = %d\n", (uint32_t) _regs[Tx_fifo_count]);
1.165 - printf("Int_raw_status: %x\n", (uint32_t) _regs[Int_raw_status]);
1.166 - printf("Trans_abort_status: %x\n", (uint32_t) _regs[Trans_abort_status]);
1.167 -
1.168 if (write_failed())
1.169 {
1.170 _fail = 1;
1.171 _regs[Int_mask] = 0;
1.172 + disable();
1.173 + enable();
1.174 return;
1.175 }
1.176