3.1 --- a/pkg/devices/lib/cpm/src/x1600.cc Thu Apr 04 00:26:27 2024 +0200
3.2 +++ b/pkg/devices/lib/cpm/src/x1600.cc Thu Apr 04 00:31:36 2024 +0200
3.3 @@ -102,6 +102,19 @@
3.4 Clock_source_sfc (Divider_sfc, 3, 30), // SFCS
3.5 Clock_source_ssi (Divider_ssi, 3, 30), // SPCS
3.6
3.7 + Clock_stop_ddr (Divider_ddr, 1, 27, true),
3.8 + Clock_stop_mac (Divider_mac, 1, 27, true),
3.9 + Clock_stop_lcd (Divider_lcd, 1, 27, true),
3.10 + Clock_stop_msc0 (Divider_msc0, 1, 27, true),
3.11 + Clock_stop_msc1 (Divider_msc1, 1, 27, true),
3.12 + Clock_stop_sfc (Divider_sfc, 1, 27, true),
3.13 + Clock_stop_ssi (Divider_ssi, 1, 27, true),
3.14 + Clock_stop_cim (Divider_cim, 1, 27, true),
3.15 + Clock_stop_pwm (Divider_pwm, 1, 27, true),
3.16 + Clock_stop_can0 (Divider_can0, 1, 27, true),
3.17 + Clock_stop_can1 (Divider_can1, 1, 27, true),
3.18 + Clock_stop_cdbus (Divider_cdbus, 1, 27, true),
3.19 +
3.20 Clock_busy_cpu (Clock_status, 1, 0),
3.21 Clock_busy_hclock0 (Clock_status, 1, 1),
3.22 Clock_busy_hclock2 (Clock_status, 1, 2),
3.23 @@ -321,19 +334,23 @@
3.24
3.25 static Clock_divided
3.26 clock_can0(Source(mux_bus, Clock_source_can0),
3.27 - Control(Clock_gate_can0, Clock_change_enable_can0, Clock_busy_can0),
3.28 + Control(Clock_gate_can0, Clock_change_enable_can0, Clock_busy_can0,
3.29 + Clock_stop_can0),
3.30 Divider(Clock_divider_can0)),
3.31
3.32 clock_can1(Source(mux_bus, Clock_source_can1),
3.33 - Control(Clock_gate_can1, Clock_change_enable_can1, Clock_busy_can1),
3.34 + Control(Clock_gate_can1, Clock_change_enable_can1, Clock_busy_can1,
3.35 + Clock_stop_can1),
3.36 Divider(Clock_divider_can1)),
3.37
3.38 clock_cdbus(Source(mux_dev, Clock_source_cdbus),
3.39 - Control(Clock_gate_cdbus, Clock_change_enable_cdbus, Clock_busy_cdbus),
3.40 + Control(Clock_gate_cdbus, Clock_change_enable_cdbus, Clock_busy_cdbus,
3.41 + Clock_stop_cdbus),
3.42 Divider(Clock_divider_cdbus)),
3.43
3.44 clock_cim(Source(mux_dev, Clock_source_cim),
3.45 - Control(Clock_gate_cim, Clock_change_enable_cim, Clock_busy_cim),
3.46 + Control(Clock_gate_cim, Clock_change_enable_cim, Clock_busy_cim,
3.47 + Clock_stop_cim),
3.48 Divider(Clock_divider_cim)),
3.49
3.50 clock_cpu(Source(mux_core, Clock_source_cpu),
3.51 @@ -341,7 +358,8 @@
3.52 Divider(Clock_divider_cpu)),
3.53
3.54 clock_ddr(Source(mux_core, Clock_source_ddr),
3.55 - Control(Clock_gate_ddr, Clock_change_enable_ddr, Clock_busy_ddr),
3.56 + Control(Clock_gate_ddr, Clock_change_enable_ddr, Clock_busy_ddr,
3.57 + Clock_stop_ddr),
3.58 Divider(Clock_divider_ddr)),
3.59
3.60 clock_hclock0(Source(mux_core, Clock_source_hclock0),
3.61 @@ -355,33 +373,40 @@
3.62 Divider(Clock_divider_l2cache)),
3.63
3.64 clock_lcd_pixel(Source(mux_dev, Clock_source_lcd),
3.65 - Control(Clock_gate_lcd_pixel, Clock_change_enable_lcd, Clock_busy_lcd),
3.66 + Control(Clock_gate_lcd_pixel, Clock_change_enable_lcd, Clock_busy_lcd,
3.67 + Clock_stop_lcd),
3.68 Divider(Clock_divider_lcd)),
3.69
3.70 clock_mac(Source(mux_dev, Clock_source_mac),
3.71 - Control(Clock_gate_gmac0, Clock_change_enable_mac, Clock_busy_mac),
3.72 + Control(Clock_gate_gmac0, Clock_change_enable_mac, Clock_busy_mac,
3.73 + Clock_stop_mac),
3.74 Divider(Clock_divider_mac)),
3.75
3.76 clock_msc0(Source(mux_dev, Clock_source_msc0),
3.77 - Control(Clock_gate_msc0, Clock_change_enable_msc0, Clock_busy_msc0),
3.78 + Control(Clock_gate_msc0, Clock_change_enable_msc0, Clock_busy_msc0,
3.79 + Clock_stop_msc0),
3.80 Divider(Clock_divider_msc0, 2)),
3.81
3.82 clock_msc1(Source(mux_dev, Clock_source_msc1),
3.83 - Control(Clock_gate_msc1, Clock_change_enable_msc1, Clock_busy_msc1),
3.84 + Control(Clock_gate_msc1, Clock_change_enable_msc1, Clock_busy_msc1,
3.85 + Clock_stop_msc1),
3.86 Divider(Clock_divider_msc1, 2)),
3.87
3.88 clock_pclock((Source(mux_hclock2_pclock)), (Divider(Clock_divider_pclock))),
3.89
3.90 clock_pwm0(Source(mux_dev, Clock_source_pwm),
3.91 - Control(Clock_gate_pwm, Clock_change_enable_pwm, Clock_busy_pwm),
3.92 + Control(Clock_gate_pwm, Clock_change_enable_pwm, Clock_busy_pwm,
3.93 + Clock_stop_pwm),
3.94 Divider(Clock_divider_pwm)),
3.95
3.96 clock_sfc(Source(mux_dev, Clock_source_sfc),
3.97 - Control(Clock_gate_sfc, Clock_change_enable_sfc, Clock_busy_sfc),
3.98 + Control(Clock_gate_sfc, Clock_change_enable_sfc, Clock_busy_sfc,
3.99 + Clock_stop_sfc),
3.100 Divider(Clock_divider_sfc)),
3.101
3.102 clock_ssi0(Source(mux_dev, Clock_source_ssi),
3.103 - Control(Clock_gate_ssi0, Clock_change_enable_ssi, Clock_busy_ssi),
3.104 + Control(Clock_gate_ssi0, Clock_change_enable_ssi, Clock_busy_ssi,
3.105 + Clock_stop_ssi),
3.106 Divider(Clock_divider_ssi));
3.107
3.108 static Clock_divided_fixed