1.1 --- a/pkg/devices/lib/gpio/src/x1600.cc Sun Sep 24 01:53:43 2023 +0200
1.2 +++ b/pkg/devices/lib/gpio/src/x1600.cc Tue Sep 26 01:13:47 2023 +0200
1.3 @@ -86,15 +86,15 @@
1.4
1.5 // Only the following registers differ from the JZ4780. The dual-edge
1.6 // registers being added to the X1600, with the pull-up/down registers being
1.7 - // relocated.
1.8 + // relocated and their sense changed from disable to enable.
1.9
1.10 Pull_edge = 0x070, // PxEDG
1.11 Pull_edge_set = 0x074, // PxEDGS
1.12 Pull_edge_clear = 0x078, // PxEDGC
1.13
1.14 - Pull_disable = 0x080, // PxPE
1.15 - Pull_disable_set = 0x084, // PxPES
1.16 - Pull_disable_clear = 0x088, // PxPEC
1.17 + Pull_enable = 0x080, // PxPE
1.18 + Pull_enable_set = 0x084, // PxPES
1.19 + Pull_enable_clear = 0x088, // PxPEC
1.20
1.21 // The shadow port Z is available at offset 0x700 and supports the INTS, INTC,
1.22 // MSKS, MSKC, PAT1S, PAT1C, PAT0S, PAT0C registers, along with the following.
1.23 @@ -310,15 +310,15 @@
1.24 switch (mode)
1.25 {
1.26 case Pull_none:
1.27 - _regs[Pull_disable_set] = _pin_bit(pin);
1.28 + _regs[Pull_enable_clear] = _pin_bit(pin);
1.29 break;
1.30 case Pull_down:
1.31 if (_pin_bit(pin) & _pull_downs)
1.32 - _regs[Pull_disable_clear] = _pin_bit(pin);
1.33 + _regs[Pull_enable_set] = _pin_bit(pin);
1.34 break;
1.35 case Pull_up:
1.36 if (_pin_bit(pin) & _pull_ups)
1.37 - _regs[Pull_disable_clear] = _pin_bit(pin);
1.38 + _regs[Pull_enable_set] = _pin_bit(pin);
1.39 break;
1.40 default:
1.41 // Invalid pull-up/down mode for pin.