paul@205 | 1 | #ifndef __TASK_GPIO_H__ |
paul@205 | 2 | #define __TASK_GPIO_H__ |
paul@205 | 3 | |
paul@205 | 4 | #include "memory.h" |
paul@205 | 5 | #include "xburst_types.h" |
paul@205 | 6 | |
paul@205 | 7 | /* Special task versions of GPIO operations. */ |
paul@205 | 8 | |
paul@218 | 9 | #define GPIO_BASE_PHYSICAL (GPIO_BASE - KSEG1_BASE) |
paul@218 | 10 | |
paul@205 | 11 | #define TASK_GPIO_PXPIN(n) (TASK_GPIO_BASE + (0x00 + (n)*0x100)) /* PIN Level Register */ |
paul@219 | 12 | |
paul@205 | 13 | #define TASK_GPIO_PXDAT(n) (TASK_GPIO_BASE + (0x10 + (n)*0x100)) /* Port Data Register */ |
paul@205 | 14 | #define TASK_GPIO_PXDATS(n) (TASK_GPIO_BASE + (0x14 + (n)*0x100)) /* Port Data Set Register */ |
paul@205 | 15 | #define TASK_GPIO_PXDATC(n) (TASK_GPIO_BASE + (0x18 + (n)*0x100)) /* Port Data Clear Register */ |
paul@205 | 16 | |
paul@219 | 17 | #define TASK_GPIO_PXIM(n) (TASK_GPIO_BASE + (0x20 + (n)*0x100)) /* Interrupt Mask Register */ |
paul@219 | 18 | #define TASK_GPIO_PXIMS(n) (TASK_GPIO_BASE + (0x24 + (n)*0x100)) /* Interrupt Mask Set Reg */ |
paul@219 | 19 | #define TASK_GPIO_PXIMC(n) (TASK_GPIO_BASE + (0x28 + (n)*0x100)) /* Interrupt Mask Clear Reg */ |
paul@219 | 20 | |
paul@219 | 21 | #define TASK_GPIO_PXPE(n) (TASK_GPIO_BASE + (0x30 + (n)*0x100)) /* Pull Enable Register */ |
paul@219 | 22 | #define TASK_GPIO_PXPES(n) (TASK_GPIO_BASE + (0x34 + (n)*0x100)) /* Pull Enable Set Reg. */ |
paul@219 | 23 | #define TASK_GPIO_PXPEC(n) (TASK_GPIO_BASE + (0x38 + (n)*0x100)) /* Pull Enable Clear Reg. */ |
paul@219 | 24 | |
paul@219 | 25 | #define TASK_GPIO_PXFUN(n) (TASK_GPIO_BASE + (0x40 + (n)*0x100)) /* Function Register */ |
paul@219 | 26 | #define TASK_GPIO_PXFUNS(n) (TASK_GPIO_BASE + (0x44 + (n)*0x100)) /* Function Set Register */ |
paul@219 | 27 | #define TASK_GPIO_PXFUNC(n) (TASK_GPIO_BASE + (0x48 + (n)*0x100)) /* Function Clear Register */ |
paul@219 | 28 | |
paul@219 | 29 | #define TASK_GPIO_PXSEL(n) (TASK_GPIO_BASE + (0x50 + (n)*0x100)) /* Select Register */ |
paul@219 | 30 | #define TASK_GPIO_PXSELS(n) (TASK_GPIO_BASE + (0x54 + (n)*0x100)) /* Select Set Register */ |
paul@219 | 31 | #define TASK_GPIO_PXSELC(n) (TASK_GPIO_BASE + (0x58 + (n)*0x100)) /* Select Clear Register */ |
paul@219 | 32 | |
paul@211 | 33 | #define TASK_GPIO_PXDIR(n) (TASK_GPIO_BASE + (0x60 + (n)*0x100)) /* Direction Register */ |
paul@211 | 34 | #define TASK_GPIO_PXDIRS(n) (TASK_GPIO_BASE + (0x64 + (n)*0x100)) /* Direction Set Register */ |
paul@211 | 35 | #define TASK_GPIO_PXDIRC(n) (TASK_GPIO_BASE + (0x68 + (n)*0x100)) /* Direction Clear Register */ |
paul@211 | 36 | |
paul@211 | 37 | #define TASK_REG_GPIO_PXPIN(n) REG32(TASK_GPIO_PXPIN((n))) |
paul@219 | 38 | |
paul@211 | 39 | #define TASK_REG_GPIO_PXDAT(n) REG32(TASK_GPIO_PXDAT((n))) |
paul@205 | 40 | #define TASK_REG_GPIO_PXDATS(n) REG32(TASK_GPIO_PXDATS((n))) |
paul@205 | 41 | #define TASK_REG_GPIO_PXDATC(n) REG32(TASK_GPIO_PXDATC((n))) |
paul@205 | 42 | |
paul@219 | 43 | #define TASK_REG_GPIO_PXIM(n) REG32(TASK_GPIO_PXIM((n))) |
paul@219 | 44 | #define TASK_REG_GPIO_PXIMS(n) REG32(TASK_GPIO_PXIMS((n))) |
paul@219 | 45 | #define TASK_REG_GPIO_PXIMC(n) REG32(TASK_GPIO_PXIMC((n))) |
paul@219 | 46 | |
paul@219 | 47 | #define TASK_REG_GPIO_PXPE(n) REG32(TASK_GPIO_PXPE((n))) |
paul@219 | 48 | #define TASK_REG_GPIO_PXPES(n) REG32(TASK_GPIO_PXPES((n))) |
paul@219 | 49 | #define TASK_REG_GPIO_PXPEC(n) REG32(TASK_GPIO_PXPEC((n))) |
paul@219 | 50 | |
paul@219 | 51 | #define TASK_REG_GPIO_PXFUN(n) REG32(TASK_GPIO_PXFUN((n))) |
paul@219 | 52 | #define TASK_REG_GPIO_PXFUNS(n) REG32(TASK_GPIO_PXFUNS((n))) |
paul@219 | 53 | #define TASK_REG_GPIO_PXFUNC(n) REG32(TASK_GPIO_PXFUNC((n))) |
paul@219 | 54 | |
paul@219 | 55 | #define TASK_REG_GPIO_PXSEL(n) REG32(TASK_GPIO_PXSEL((n))) |
paul@219 | 56 | #define TASK_REG_GPIO_PXSELS(n) REG32(TASK_GPIO_PXSELS((n))) |
paul@219 | 57 | #define TASK_REG_GPIO_PXSELC(n) REG32(TASK_GPIO_PXSELC((n))) |
paul@219 | 58 | |
paul@211 | 59 | #define TASK_REG_GPIO_PXDIR(n) REG32(TASK_GPIO_PXDIR((n))) |
paul@211 | 60 | #define TASK_REG_GPIO_PXDIRS(n) REG32(TASK_GPIO_PXDIRS((n))) |
paul@211 | 61 | #define TASK_REG_GPIO_PXDIRC(n) REG32(TASK_GPIO_PXDIRC((n))) |
paul@211 | 62 | |
paul@217 | 63 | void task_gpio_init(uint8_t task); |
paul@217 | 64 | void task_gpio_as_input(uint8_t pin); |
paul@217 | 65 | void task_gpio_as_output(uint8_t pin); |
paul@219 | 66 | |
paul@219 | 67 | void task_gpio_enable_pull(uint8_t pin); |
paul@219 | 68 | void task_gpio_disable_pull(uint8_t pin); |
paul@219 | 69 | |
paul@219 | 70 | int task_gpio_get_pin(uint8_t pin); |
paul@217 | 71 | void task_gpio_set_pin(uint8_t pin); |
paul@217 | 72 | void task_gpio_clear_pin(uint8_t pin); |
paul@219 | 73 | |
paul@219 | 74 | void task_gpio_mask_irq(uint8_t pin); |
paul@219 | 75 | void task_gpio_unmask_irq(uint8_t pin); |
paul@205 | 76 | |
paul@205 | 77 | #endif /* __TASK_GPIO_H__ */ |