paul@16 | 1 | /* |
paul@16 | 2 | * Ben NanoNote board late initialisation, based on uboot-xburst and xburst-tools. |
paul@16 | 3 | * |
paul@33 | 4 | * Copyright (C) 2000-2009 Wolfgang Denk, DENX Software Engineering, <wd@denx.de> |
paul@33 | 5 | * Copyright (C) 2006 Ingenic Semiconductor, <jlwei@ingenic.cn> |
paul@16 | 6 | * Copyright (C) Xiangfu Liu <xiangfu.z@gmail.com> |
paul@217 | 7 | * Copyright (C) 2015, 2016, 2017 Paul Boddie <paul@boddie.org.uk> |
paul@16 | 8 | * |
paul@63 | 9 | * This program is free software: you can redistribute it and/or modify |
paul@63 | 10 | * it under the terms of the GNU General Public License as published by |
paul@63 | 11 | * the Free Software Foundation, either version 3 of the License, or |
paul@63 | 12 | * (at your option) any later version. |
paul@16 | 13 | * |
paul@63 | 14 | * This program is distributed in the hope that it will be useful, |
paul@63 | 15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
paul@63 | 16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
paul@63 | 17 | * GNU General Public License for more details. |
paul@16 | 18 | * |
paul@63 | 19 | * You should have received a copy of the GNU General Public License |
paul@63 | 20 | * along with this program. If not, see <http://www.gnu.org/licenses/>. |
paul@16 | 21 | */ |
paul@16 | 22 | |
paul@33 | 23 | #include "board.h" |
paul@16 | 24 | #include "nanonote.h" |
paul@230 | 25 | #include "cpm.h" |
paul@233 | 26 | #include "gpio.h" |
paul@16 | 27 | |
paul@16 | 28 | /* Later initialisation functions. */ |
paul@16 | 29 | |
paul@195 | 30 | void gpio_init2() |
paul@16 | 31 | { |
paul@233 | 32 | void *gpio_port_base; |
paul@204 | 33 | |
paul@233 | 34 | /* |
paul@233 | 35 | Initialise LCD pins. |
paul@233 | 36 | gpio_as_slcd_8bit: LCD_D0~LCD_D7, SLCD_CLK, SLCD_RS, SLCD_CS, LCD_DE |
paul@233 | 37 | */ |
paul@16 | 38 | |
paul@233 | 39 | gpio_port_base = jz4740_gpio_get_port((void *) GPIO_BASE, GPIO_PORT_LCD); |
paul@233 | 40 | jz4740_gpio_ctrl_set(gpio_port_base, GPIO_PXFUNS, GPIO_SLCD8_MASK); |
paul@233 | 41 | jz4740_gpio_ctrl_set(gpio_port_base, GPIO_PXSELC, GPIO_SLCD8_MASK); |
paul@204 | 42 | |
paul@233 | 43 | /* |
paul@233 | 44 | Initialise MSC pins. |
paul@233 | 45 | gpio_as_msc: MSC_CMD, MSC_CLK, MSC_D0 ~ MSC_D3 |
paul@233 | 46 | */ |
paul@233 | 47 | |
paul@233 | 48 | gpio_port_base = jz4740_gpio_get_port((void *) GPIO_BASE, GPIO_PORT_MSC); |
paul@233 | 49 | jz4740_gpio_ctrl_set(gpio_port_base, GPIO_PXFUNS, GPIO_MSC_MASK); |
paul@233 | 50 | jz4740_gpio_ctrl_set(gpio_port_base, GPIO_PXSELC, GPIO_MSC_MASK); |
paul@233 | 51 | jz4740_gpio_ctrl_set(gpio_port_base, GPIO_PXPES, GPIO_MSC_MASK); |
paul@16 | 52 | |
paul@204 | 53 | /* Initialise other pins. */ |
paul@204 | 54 | |
paul@233 | 55 | /* Enable TP4, TP5 as UART0 (gpio_jtag_to_uart0). */ |
paul@204 | 56 | |
paul@233 | 57 | gpio_port_base = jz4740_gpio_get_port((void *) GPIO_BASE, GPIO_PORT_JTAG); |
paul@233 | 58 | jz4740_gpio_ctrl_set(gpio_port_base, GPIO_PXSELS, 1 << GPIO_JTAG_UART_EN); |
paul@233 | 59 | |
paul@233 | 60 | /* Enable pull-up on the power switch. */ |
paul@16 | 61 | |
paul@233 | 62 | gpio_port_base = jz4740_gpio_get_port((void *) GPIO_BASE, GPIO_PORT_POWER); |
paul@233 | 63 | jz4740_gpio_as_input(gpio_port_base, GPIO_POWER); |
paul@233 | 64 | jz4740_gpio_enable_pull(gpio_port_base, GPIO_POWER); |
paul@233 | 65 | |
paul@233 | 66 | /* Enable audio output. */ |
paul@108 | 67 | |
paul@233 | 68 | gpio_port_base = jz4740_gpio_get_port((void *) GPIO_BASE, GPIO_PORT_AUDIO); |
paul@233 | 69 | jz4740_gpio_as_output(gpio_port_base, GPIO_AUDIO_EN); |
paul@233 | 70 | jz4740_gpio_set_pin(gpio_port_base, GPIO_AUDIO_EN); |
paul@16 | 71 | |
paul@233 | 72 | /* Enable LCD signalling. */ |
paul@16 | 73 | |
paul@233 | 74 | gpio_port_base = jz4740_gpio_get_port((void *) GPIO_BASE, GPIO_PORT_LCD); |
paul@233 | 75 | jz4740_gpio_as_output(gpio_port_base, GPIO_LCD_CS); |
paul@233 | 76 | jz4740_gpio_clear_pin(gpio_port_base, GPIO_LCD_CS); |
paul@233 | 77 | |
paul@233 | 78 | /* Enable speaker. */ |
paul@233 | 79 | |
paul@233 | 80 | gpio_port_base = jz4740_gpio_get_port((void *) GPIO_BASE, GPIO_PORT_AMP); |
paul@233 | 81 | jz4740_gpio_as_output(gpio_port_base, GPIO_AMP_EN); |
paul@233 | 82 | jz4740_gpio_clear_pin(gpio_port_base, GPIO_AMP_EN); |
paul@233 | 83 | |
paul@233 | 84 | /* Disable pull-up on SD pins. */ |
paul@16 | 85 | |
paul@233 | 86 | gpio_port_base = jz4740_gpio_get_port((void *) GPIO_BASE, GPIO_PORT_SD); |
paul@233 | 87 | jz4740_gpio_as_output(gpio_port_base, GPIO_SDPW_EN); |
paul@233 | 88 | jz4740_gpio_disable_pull(gpio_port_base, GPIO_SDPW_EN); |
paul@233 | 89 | jz4740_gpio_clear_pin(gpio_port_base, GPIO_SDPW_EN); |
paul@233 | 90 | jz4740_gpio_as_input(gpio_port_base, GPIO_SD_DETECT); |
paul@233 | 91 | jz4740_gpio_disable_pull(gpio_port_base, GPIO_SD_DETECT); |
paul@16 | 92 | |
paul@233 | 93 | /* Enable pull-up on USB detect pin. */ |
paul@16 | 94 | |
paul@233 | 95 | gpio_port_base = jz4740_gpio_get_port((void *) GPIO_BASE, GPIO_PORT_USB); |
paul@233 | 96 | jz4740_gpio_as_input(gpio_port_base, GPIO_USB_DETECT); |
paul@233 | 97 | jz4740_gpio_enable_pull(gpio_port_base, GPIO_USB_DETECT); |
paul@212 | 98 | |
paul@212 | 99 | /* Employ a PWM channel for the buzzer. */ |
paul@212 | 100 | |
paul@233 | 101 | jz4740_gpio_as_pwm((void *) GPIO_BASE, 4); |
paul@16 | 102 | } |
paul@16 | 103 | |
paul@195 | 104 | void rtc_init() |
paul@16 | 105 | { |
paul@16 | 106 | while ( !__rtc_write_ready()); |
paul@16 | 107 | __rtc_enable_alarm(); /* enable alarm */ |
paul@16 | 108 | |
paul@16 | 109 | while ( !__rtc_write_ready()); |
paul@16 | 110 | REG_RTC_RGR = 0x00007fff; /* type value */ |
paul@16 | 111 | |
paul@16 | 112 | while ( !__rtc_write_ready()); |
paul@16 | 113 | REG_RTC_HWFCR = 0x0000ffe0; /* Power on delay 2s */ |
paul@16 | 114 | |
paul@16 | 115 | while ( !__rtc_write_ready()); |
paul@16 | 116 | REG_RTC_HRCR = 0x00000fe0; /* reset delay 125ms */ |
paul@16 | 117 | } |
paul@16 | 118 | |
paul@16 | 119 | /* Timer routines. */ |
paul@16 | 120 | |
paul@33 | 121 | unsigned long timestamp; |
paul@33 | 122 | unsigned long lastdec; |
paul@16 | 123 | |
paul@16 | 124 | /* |
paul@68 | 125 | * Timer without interrupts. |
paul@16 | 126 | */ |
paul@16 | 127 | |
paul@195 | 128 | void timer_init() |
paul@16 | 129 | { |
paul@68 | 130 | __tcu_disable_pwm_output(TIMER_CHAN); |
paul@50 | 131 | __tcu_select_extalclk(TIMER_CHAN); |
paul@50 | 132 | __tcu_select_clk_div256(TIMER_CHAN); |
paul@50 | 133 | __tcu_set_count(TIMER_CHAN, 0); |
paul@50 | 134 | __tcu_set_half_data(TIMER_CHAN, 0); |
paul@50 | 135 | __tcu_set_full_data(TIMER_CHAN, TIMER_FDATA); |
paul@16 | 136 | |
paul@50 | 137 | __tcu_mask_half_match_irq(TIMER_CHAN); |
paul@50 | 138 | __tcu_mask_full_match_irq(TIMER_CHAN); |
paul@50 | 139 | __tcu_start_timer_clock(TIMER_CHAN); |
paul@50 | 140 | __tcu_start_counter(TIMER_CHAN); |
paul@16 | 141 | |
paul@230 | 142 | jz4740_cpm_start_clock((void *) CPM_BASE); |
paul@68 | 143 | |
paul@16 | 144 | lastdec = 0; |
paul@16 | 145 | timestamp = 0; |
paul@16 | 146 | } |
paul@54 | 147 | |
paul@68 | 148 | /* Timer interrupt activation. */ |
paul@68 | 149 | |
paul@195 | 150 | void timer_init_irq() |
paul@68 | 151 | { |
paul@68 | 152 | __tcu_unmask_full_match_irq(TIMER_CHAN); |
paul@68 | 153 | __tcu_clear_full_match_flag(TIMER_CHAN); |
paul@68 | 154 | __intc_unmask_irq(TIMER_CHAN_IRQ); |
paul@68 | 155 | } |
paul@68 | 156 | |
paul@195 | 157 | void timer_clear() |
paul@153 | 158 | { |
paul@153 | 159 | __intc_ack_irq(TIMER_CHAN_IRQ); |
paul@153 | 160 | __tcu_clear_full_match_flag(TIMER_CHAN); |
paul@153 | 161 | } |
paul@153 | 162 | |
paul@196 | 163 | /* GPIO interrupt activation. */ |
paul@196 | 164 | |
paul@196 | 165 | void gpio_init_irq() |
paul@196 | 166 | { |
paul@233 | 167 | void *gpio_port_base = jz4740_gpio_get_port((void *) GPIO_BASE, GPIO_PORT_POWER); |
paul@233 | 168 | jz4740_gpio_as_irq(gpio_port_base, GPIO_POWER, gpio_irq_level_low); |
paul@233 | 169 | __intc_unmask_irq(GPIO_IRQ3); |
paul@196 | 170 | } |
paul@196 | 171 | |
paul@217 | 172 | int gpio_have_irq(uint8_t gpio) |
paul@196 | 173 | { |
paul@233 | 174 | void *gpio_port_base = jz4740_gpio_get_port((void *) GPIO_BASE, gpio / 32); |
paul@233 | 175 | return jz4740_gpio_have_irq(gpio_port_base, gpio % 32); |
paul@196 | 176 | } |
paul@196 | 177 | |
paul@68 | 178 | /* Board startup detection. */ |
paul@68 | 179 | |
paul@195 | 180 | int is_started() |
paul@54 | 181 | { |
paul@230 | 182 | return jz4740_cpm_have_clock((void *) CPM_BASE); |
paul@54 | 183 | } |