paul@33 | 1 | /* |
paul@38 | 2 | * JzRISC LCD controller |
paul@33 | 3 | * |
paul@33 | 4 | * Copyright (C) Xiangfu Liu <xiangfu@sharism.cc> |
paul@217 | 5 | * Copyright (C) 2015, 2016, 2017 Paul Boddie <paul@boddie.org.uk> |
paul@33 | 6 | * |
paul@33 | 7 | * This program is free software; you can redistribute it and/or |
paul@33 | 8 | * modify it under the terms of the GNU General Public License as |
paul@33 | 9 | * published by the Free Software Foundation; either version 2 of |
paul@33 | 10 | * the License, or (at your option) any later version. |
paul@33 | 11 | * |
paul@33 | 12 | * This program is distributed in the hope that it will be useful, |
paul@33 | 13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
paul@33 | 14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
paul@33 | 15 | * GNU General Public License for more details. |
paul@33 | 16 | * |
paul@33 | 17 | * You should have received a copy of the GNU General Public License |
paul@33 | 18 | * along with this program; if not, write to the Free Software |
paul@42 | 19 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, |
paul@42 | 20 | * Boston, MA 02110-1301, USA |
paul@33 | 21 | */ |
paul@33 | 22 | |
paul@33 | 23 | #include "sdram.h" |
paul@33 | 24 | #include "jzlcd.h" |
paul@62 | 25 | #include "cpu.h" |
paul@33 | 26 | #include "board.h" |
paul@33 | 27 | |
paul@33 | 28 | #define align2(n) (n)=((((n)+1)>>1)<<1) |
paul@33 | 29 | #define align4(n) (n)=((((n)+3)>>2)<<2) |
paul@33 | 30 | #define align8(n) (n)=((((n)+7)>>3)<<3) |
paul@33 | 31 | |
paul@34 | 32 | extern vidinfo_t panel_info; |
paul@33 | 33 | |
paul@221 | 34 | static uint16_t lcd_get_panels(vidinfo_t *vid) |
paul@100 | 35 | { |
paul@221 | 36 | struct jzfb_info *jzfb = vid->jz_fb; |
paul@221 | 37 | return ((jzfb->cfg & MODE_MASK) == MODE_STN_MONO_DUAL) || |
paul@221 | 38 | ((jzfb->cfg & MODE_MASK) == MODE_STN_COLOR_DUAL) ? 2 : 1; |
paul@100 | 39 | } |
paul@100 | 40 | |
paul@102 | 41 | |
paul@102 | 42 | |
paul@102 | 43 | /* Functions returning region sizes. */ |
paul@102 | 44 | |
paul@217 | 45 | static uint32_t lcd_get_size(vidinfo_t *vid) |
paul@33 | 46 | { |
paul@100 | 47 | /* Lines must be aligned to a word boundary. */ |
paul@221 | 48 | uint32_t line_length = ALIGN((vid->jz_fb->w * vid->jz_fb->bpp) / 8, sizeof(uint32_t)); |
paul@221 | 49 | return line_length * vid->jz_fb->h; |
paul@33 | 50 | } |
paul@33 | 51 | |
paul@217 | 52 | static uint32_t lcd_get_aligned_size(vidinfo_t *vid) |
paul@100 | 53 | { |
paul@100 | 54 | /* LCD_CTRL_BST_16 requires 16-word alignment. */ |
paul@217 | 55 | return ALIGN(lcd_get_size(vid), 16 * sizeof(uint32_t)); |
paul@100 | 56 | } |
paul@100 | 57 | |
paul@217 | 58 | static uint32_t lcd_get_min_size(vidinfo_t *vid) |
paul@100 | 59 | { |
paul@100 | 60 | /* Lines must be aligned to a word boundary. */ |
paul@221 | 61 | uint32_t line_length = ALIGN((vid->jz_fb->w * 32) / 8, sizeof(uint32_t)); |
paul@221 | 62 | return line_length * vid->jz_fb->h; |
paul@100 | 63 | } |
paul@100 | 64 | |
paul@217 | 65 | static uint32_t lcd_get_aligned_min_size(vidinfo_t *vid) |
paul@100 | 66 | { |
paul@100 | 67 | /* LCD_CTRL_BST_16 requires 16-word alignment. */ |
paul@217 | 68 | return ALIGN(lcd_get_min_size(vid), 16 * sizeof(uint32_t)); |
paul@100 | 69 | } |
paul@100 | 70 | |
paul@217 | 71 | static uint32_t lcd_get_palette_size(vidinfo_t *vid) |
paul@97 | 72 | { |
paul@221 | 73 | if (vid->jz_fb->bpp < 12) |
paul@221 | 74 | return (1 << (vid->jz_fb->bpp)) * sizeof(uint16_t); |
paul@102 | 75 | else |
paul@102 | 76 | return 0; |
paul@97 | 77 | } |
paul@97 | 78 | |
paul@217 | 79 | static uint32_t lcd_get_aligned_palette_size(vidinfo_t *vid) |
paul@100 | 80 | { |
paul@100 | 81 | /* LCD_CTRL_BST_16 requires 16-word alignment. */ |
paul@217 | 82 | return ALIGN(lcd_get_palette_size(vid), 16 * sizeof(uint32_t)); |
paul@100 | 83 | } |
paul@100 | 84 | |
paul@217 | 85 | static uint32_t lcd_get_descriptors_size() |
paul@98 | 86 | { |
paul@98 | 87 | return 3 * sizeof(struct jz_fb_dma_descriptor); |
paul@98 | 88 | } |
paul@98 | 89 | |
paul@217 | 90 | static uint32_t lcd_get_total_size(vidinfo_t *vid) |
paul@97 | 91 | { |
paul@221 | 92 | uint32_t size = lcd_get_aligned_size(vid) * lcd_get_panels(vid); |
paul@217 | 93 | uint32_t min_size = lcd_get_aligned_min_size(vid); |
paul@100 | 94 | |
paul@100 | 95 | /* Round up to nearest full page, or MMU section if defined. */ |
paul@102 | 96 | return ALIGN((size >= min_size ? size : min_size) + lcd_get_aligned_palette_size(vid) + lcd_get_descriptors_size(), PAGE_SIZE); |
paul@93 | 97 | } |
paul@48 | 98 | |
paul@102 | 99 | |
paul@102 | 100 | |
paul@102 | 101 | /* Functions returning addresses of each data region. */ |
paul@102 | 102 | |
paul@221 | 103 | static uint32_t lcd_get_palette(uint32_t addr, vidinfo_t *vid) |
paul@93 | 104 | { |
paul@98 | 105 | /* Allocate memory at the end of the region for the palette. */ |
paul@221 | 106 | return addr - lcd_get_aligned_palette_size(vid); |
paul@98 | 107 | } |
paul@98 | 108 | |
paul@221 | 109 | static uint32_t lcd_get_descriptors(uint32_t addr, vidinfo_t *vid) |
paul@98 | 110 | { |
paul@98 | 111 | /* Allocate memory before the palette for the descriptor array. */ |
paul@221 | 112 | return lcd_get_palette(addr, vid) - lcd_get_descriptors_size(); |
paul@48 | 113 | } |
paul@48 | 114 | |
paul@221 | 115 | static uint32_t lcd_get_framebuffer(uint32_t addr, uint16_t panel, vidinfo_t *vid) |
paul@97 | 116 | { |
paul@97 | 117 | /* Allocate pages for the frame buffer and palette. */ |
paul@221 | 118 | return addr - lcd_get_total_size(vid) + (panel * lcd_get_aligned_size(vid)); |
paul@97 | 119 | } |
paul@97 | 120 | |
paul@102 | 121 | |
paul@102 | 122 | |
paul@102 | 123 | /* Initialisation functions. */ |
paul@102 | 124 | |
paul@33 | 125 | static void jz_lcd_desc_init(vidinfo_t *vid) |
paul@33 | 126 | { |
paul@94 | 127 | struct jz_fb_dma_descriptor *descriptors; |
paul@221 | 128 | struct jz_mem_info * fbi; |
paul@95 | 129 | |
paul@221 | 130 | fbi = &vid->jz_mem; |
paul@96 | 131 | |
paul@96 | 132 | /* Allocate space for descriptors before the palette entries. */ |
paul@96 | 133 | |
paul@221 | 134 | descriptors = (struct jz_fb_dma_descriptor *) lcd_get_descriptors(get_memory_size(), vid); |
paul@94 | 135 | fbi->dmadesc_fblow = (struct jz_fb_dma_descriptor *) &descriptors[0]; |
paul@94 | 136 | fbi->dmadesc_fbhigh = (struct jz_fb_dma_descriptor *) &descriptors[1]; |
paul@94 | 137 | fbi->dmadesc_palette = (struct jz_fb_dma_descriptor *) &descriptors[2]; |
paul@33 | 138 | |
paul@96 | 139 | /* Populate descriptors. */ |
paul@96 | 140 | |
paul@221 | 141 | if (lcd_get_panels(vid) == 2) |
paul@100 | 142 | { |
paul@100 | 143 | fbi->dmadesc_fblow->fdadr = fbi->dmadesc_fblow; |
paul@221 | 144 | fbi->dmadesc_fblow->fsadr = lcd_get_framebuffer(get_memory_size(), 1, vid); |
paul@100 | 145 | fbi->dmadesc_fblow->fidr = 0; |
paul@100 | 146 | fbi->dmadesc_fblow->ldcmd = lcd_get_size(vid) / 4 ; |
paul@33 | 147 | |
paul@100 | 148 | fbi->fdadr1 = fbi->dmadesc_fblow; /* only used in dual-panel mode */ |
paul@100 | 149 | } |
paul@33 | 150 | |
paul@95 | 151 | fbi->dmadesc_fbhigh->fsadr = fbi->screen; |
paul@33 | 152 | fbi->dmadesc_fbhigh->fidr = 0; |
paul@100 | 153 | fbi->dmadesc_fbhigh->ldcmd = lcd_get_size(vid) / 4; /* length in words */ |
paul@33 | 154 | |
paul@221 | 155 | if (vid->jz_fb->bpp < 12) |
paul@33 | 156 | { |
paul@101 | 157 | fbi->dmadesc_palette->fsadr = fbi->palette; |
paul@101 | 158 | fbi->dmadesc_palette->fidr = 0; |
paul@102 | 159 | fbi->dmadesc_palette->ldcmd = (lcd_get_palette_size(vid) / 4) | (1<<28); |
paul@101 | 160 | |
paul@33 | 161 | /* assume any mode with <12 bpp is palette driven */ |
paul@95 | 162 | fbi->dmadesc_palette->fdadr = fbi->dmadesc_fbhigh; |
paul@95 | 163 | fbi->dmadesc_fbhigh->fdadr = fbi->dmadesc_palette; |
paul@33 | 164 | /* flips back and forth between pal and fbhigh */ |
paul@95 | 165 | fbi->fdadr0 = fbi->dmadesc_palette; |
paul@33 | 166 | } else { |
paul@33 | 167 | /* palette shouldn't be loaded in true-color mode */ |
paul@95 | 168 | fbi->dmadesc_fbhigh->fdadr = fbi->dmadesc_fbhigh; |
paul@95 | 169 | fbi->fdadr0 = fbi->dmadesc_fbhigh; /* no pal just fbhigh */ |
paul@33 | 170 | } |
paul@33 | 171 | |
paul@33 | 172 | flush_cache_all(); |
paul@33 | 173 | } |
paul@33 | 174 | |
paul@221 | 175 | static uint32_t jz_lcd_stn_init(uint32_t stnH, vidinfo_t *vid) |
paul@96 | 176 | { |
paul@221 | 177 | struct jzfb_info *jzfb = vid->jz_fb; |
paul@217 | 178 | uint32_t val = 0; |
paul@96 | 179 | |
paul@221 | 180 | switch (jzfb->bpp) { |
paul@96 | 181 | case 1: |
paul@96 | 182 | /* val |= LCD_CTRL_PEDN; */ |
paul@96 | 183 | case 2: |
paul@96 | 184 | val |= LCD_CTRL_FRC_2; |
paul@96 | 185 | break; |
paul@96 | 186 | case 4: |
paul@96 | 187 | val |= LCD_CTRL_FRC_4; |
paul@96 | 188 | break; |
paul@96 | 189 | case 8: |
paul@96 | 190 | default: |
paul@96 | 191 | val |= LCD_CTRL_FRC_16; |
paul@96 | 192 | break; |
paul@96 | 193 | } |
paul@96 | 194 | |
paul@221 | 195 | switch (jzfb->cfg & STN_DAT_PINMASK) { |
paul@96 | 196 | case STN_DAT_PIN1: |
paul@96 | 197 | /* Do not adjust the hori-param value. */ |
paul@96 | 198 | break; |
paul@96 | 199 | case STN_DAT_PIN2: |
paul@221 | 200 | align2(jzfb->hsw); |
paul@221 | 201 | align2(jzfb->elw); |
paul@221 | 202 | align2(jzfb->blw); |
paul@96 | 203 | break; |
paul@96 | 204 | case STN_DAT_PIN4: |
paul@221 | 205 | align4(jzfb->hsw); |
paul@221 | 206 | align4(jzfb->elw); |
paul@221 | 207 | align4(jzfb->blw); |
paul@96 | 208 | break; |
paul@96 | 209 | case STN_DAT_PIN8: |
paul@221 | 210 | align8(jzfb->hsw); |
paul@221 | 211 | align8(jzfb->elw); |
paul@221 | 212 | align8(jzfb->blw); |
paul@96 | 213 | break; |
paul@96 | 214 | } |
paul@96 | 215 | |
paul@221 | 216 | REG_LCD_VSYNC = (0 << 16) | jzfb->vsw; |
paul@221 | 217 | REG_LCD_HSYNC = ((jzfb->blw+jzfb->w) << 16) | (jzfb->blw+jzfb->w+jzfb->hsw); |
paul@96 | 218 | |
paul@96 | 219 | /* Screen setting */ |
paul@221 | 220 | REG_LCD_VAT = ((jzfb->blw + jzfb->w + jzfb->hsw + jzfb->elw) << 16) | (stnH + jzfb->vsw + jzfb->bfw + jzfb->efw); |
paul@221 | 221 | REG_LCD_DAH = (jzfb->blw << 16) | (jzfb->blw + jzfb->w); |
paul@96 | 222 | REG_LCD_DAV = (0 << 16) | (stnH); |
paul@96 | 223 | |
paul@96 | 224 | /* AC BIAs signal */ |
paul@221 | 225 | REG_LCD_PS = (0 << 16) | (stnH+jzfb->vsw+jzfb->efw+jzfb->bfw); |
paul@96 | 226 | |
paul@96 | 227 | return val; |
paul@96 | 228 | } |
paul@96 | 229 | |
paul@221 | 230 | static void jz_lcd_tft_init(vidinfo_t *vid) |
paul@96 | 231 | { |
paul@221 | 232 | struct jzfb_info *jzfb = vid->jz_fb; |
paul@221 | 233 | REG_LCD_VSYNC = (0 << 16) | jzfb->vsw; |
paul@221 | 234 | REG_LCD_HSYNC = (0 << 16) | jzfb->hsw; |
paul@221 | 235 | REG_LCD_DAV =((jzfb->vsw+jzfb->bfw) << 16) | (jzfb->vsw +jzfb->bfw+jzfb->h); |
paul@221 | 236 | REG_LCD_DAH = ((jzfb->hsw + jzfb->blw) << 16) | (jzfb->hsw + jzfb->blw + jzfb->w ); |
paul@221 | 237 | REG_LCD_VAT = (((jzfb->blw + jzfb->w + jzfb->elw + jzfb->hsw)) << 16) \ |
paul@221 | 238 | | (jzfb->vsw + jzfb->bfw + jzfb->h + jzfb->efw); |
paul@96 | 239 | } |
paul@96 | 240 | |
paul@221 | 241 | static void jz_lcd_samsung_init(uint32_t pclk, vidinfo_t *vid) |
paul@106 | 242 | { |
paul@221 | 243 | struct jzfb_info *jzfb = vid->jz_fb; |
paul@217 | 244 | uint32_t total, tp_s, tp_e, ckv_s, ckv_e; |
paul@217 | 245 | uint32_t rev_s, rev_e, inv_s, inv_e; |
paul@106 | 246 | |
paul@221 | 247 | jz_lcd_tft_init(vid); |
paul@106 | 248 | |
paul@221 | 249 | total = jzfb->blw + jzfb->w + jzfb->elw + jzfb->hsw; |
paul@221 | 250 | tp_s = jzfb->blw + jzfb->w + 1; |
paul@106 | 251 | tp_e = tp_s + 1; |
paul@106 | 252 | /* ckv_s = tp_s - jz_clocks.pixclk/(1000000000/4100); */ |
paul@106 | 253 | ckv_s = tp_s - pclk/(1000000000/4100); |
paul@106 | 254 | ckv_e = tp_s + total; |
paul@106 | 255 | rev_s = tp_s - 11; /* -11.5 clk */ |
paul@106 | 256 | rev_e = rev_s + total; |
paul@106 | 257 | inv_s = tp_s; |
paul@106 | 258 | inv_e = inv_s + total; |
paul@106 | 259 | REG_LCD_CLS = (tp_s << 16) | tp_e; |
paul@106 | 260 | REG_LCD_PS = (ckv_s << 16) | ckv_e; |
paul@106 | 261 | REG_LCD_SPL = (rev_s << 16) | rev_e; |
paul@106 | 262 | REG_LCD_REV = (inv_s << 16) | inv_e; |
paul@221 | 263 | jzfb->cfg |= STFT_REVHI | STFT_SPLHI; |
paul@106 | 264 | } |
paul@106 | 265 | |
paul@221 | 266 | static void jz_lcd_sharp_init(vidinfo_t *vid) |
paul@106 | 267 | { |
paul@221 | 268 | struct jzfb_info *jzfb = vid->jz_fb; |
paul@217 | 269 | uint32_t total, cls_s, cls_e, ps_s, ps_e; |
paul@217 | 270 | uint32_t spl_s, spl_e, rev_s, rev_e; |
paul@106 | 271 | |
paul@221 | 272 | jz_lcd_tft_init(vid); |
paul@106 | 273 | |
paul@221 | 274 | total = jzfb->blw + jzfb->w + jzfb->elw + jzfb->hsw; |
paul@106 | 275 | spl_s = 1; |
paul@106 | 276 | spl_e = spl_s + 1; |
paul@106 | 277 | cls_s = 0; |
paul@106 | 278 | cls_e = total - 60; /* > 4us (pclk = 80ns) */ |
paul@106 | 279 | ps_s = cls_s; |
paul@106 | 280 | ps_e = cls_e; |
paul@106 | 281 | rev_s = total - 40; /* > 3us (pclk = 80ns) */ |
paul@106 | 282 | rev_e = rev_s + total; |
paul@221 | 283 | jzfb->cfg |= STFT_PSHI; |
paul@106 | 284 | REG_LCD_SPL = (spl_s << 16) | spl_e; |
paul@106 | 285 | REG_LCD_CLS = (cls_s << 16) | cls_e; |
paul@106 | 286 | REG_LCD_PS = (ps_s << 16) | ps_e; |
paul@106 | 287 | REG_LCD_REV = (rev_s << 16) | rev_e; |
paul@106 | 288 | } |
paul@106 | 289 | |
paul@221 | 290 | static uint32_t jz_lcd_get_pixel_clock(vidinfo_t *vid) |
paul@98 | 291 | { |
paul@221 | 292 | struct jzfb_info *jzfb = vid->jz_fb; |
paul@217 | 293 | uint32_t pclk; |
paul@98 | 294 | |
paul@98 | 295 | /* Derive pixel clock from frame clock. */ |
paul@98 | 296 | |
paul@221 | 297 | if ( (jzfb->cfg & MODE_MASK) != MODE_8BIT_SERIAL_TFT) { |
paul@221 | 298 | pclk = jzfb->fclk * (jzfb->w + jzfb->hsw + jzfb->elw + jzfb->blw) * |
paul@221 | 299 | (jzfb->h + jzfb->vsw + jzfb->efw + jzfb->bfw); |
paul@98 | 300 | } else { |
paul@98 | 301 | /* serial mode: Hsync period = 3*Width_Pixel */ |
paul@221 | 302 | pclk = jzfb->fclk * (jzfb->w*3 + jzfb->hsw + jzfb->elw + jzfb->blw) * |
paul@221 | 303 | (jzfb->h + jzfb->vsw + jzfb->efw + jzfb->bfw); |
paul@98 | 304 | } |
paul@98 | 305 | |
paul@221 | 306 | if (((jzfb->cfg & MODE_MASK) == MODE_STN_COLOR_SINGLE) || |
paul@221 | 307 | ((jzfb->cfg & MODE_MASK) == MODE_STN_COLOR_DUAL)) |
paul@98 | 308 | pclk = (pclk * 3); |
paul@98 | 309 | |
paul@221 | 310 | if (((jzfb->cfg & MODE_MASK) == MODE_STN_COLOR_SINGLE) || |
paul@221 | 311 | ((jzfb->cfg & MODE_MASK) == MODE_STN_COLOR_DUAL) || |
paul@221 | 312 | ((jzfb->cfg & MODE_MASK) == MODE_STN_MONO_SINGLE) || |
paul@221 | 313 | ((jzfb->cfg & MODE_MASK) == MODE_STN_MONO_DUAL)) |
paul@221 | 314 | pclk = pclk >> ((jzfb->cfg & STN_DAT_PINMASK) >> 4); |
paul@98 | 315 | |
paul@221 | 316 | if (((jzfb->cfg & MODE_MASK) == MODE_STN_COLOR_DUAL) || |
paul@221 | 317 | ((jzfb->cfg & MODE_MASK) == MODE_STN_MONO_DUAL)) |
paul@98 | 318 | pclk >>= 1; |
paul@98 | 319 | |
paul@98 | 320 | return pclk; |
paul@98 | 321 | } |
paul@98 | 322 | |
paul@217 | 323 | static void jz_lcd_set_timing(uint32_t pclk) |
paul@98 | 324 | { |
paul@217 | 325 | uint32_t val; |
paul@98 | 326 | |
paul@98 | 327 | #ifdef CONFIG_CPU_JZ4730 |
paul@98 | 328 | val = __cpm_get_pllout() / pclk; |
paul@98 | 329 | REG_CPM_CFCR2 = val - 1; |
paul@98 | 330 | val = pclk * 4 ; |
paul@98 | 331 | if ( val > 150000000 ) { |
paul@98 | 332 | val = 150000000; |
paul@98 | 333 | } |
paul@98 | 334 | val = __cpm_get_pllout() / val; |
paul@98 | 335 | val--; |
paul@98 | 336 | if ( val > 0xF ) |
paul@98 | 337 | val = 0xF; |
paul@98 | 338 | #else |
paul@98 | 339 | int pll_div; |
paul@98 | 340 | |
paul@98 | 341 | pll_div = ( REG_CPM_CPCCR & CPM_CPCCR_PCS ); /* clock source,0:pllout/2 1: pllout */ |
paul@98 | 342 | pll_div = pll_div ? 1 : 2 ; |
paul@98 | 343 | val = ( __cpm_get_pllout()/pll_div ) / pclk; |
paul@98 | 344 | val--; |
paul@98 | 345 | if ( val > 0x1ff ) { |
paul@98 | 346 | val = 0x1ff; |
paul@98 | 347 | } |
paul@98 | 348 | __cpm_set_pixdiv(val); |
paul@98 | 349 | |
paul@98 | 350 | val = pclk * 3 ; /* LCDClock > 2.5*Pixclock */ |
paul@98 | 351 | if ( val > 150000000 ) { |
paul@98 | 352 | val = 150000000; |
paul@98 | 353 | } |
paul@98 | 354 | val = ( __cpm_get_pllout()/pll_div ) / val; |
paul@98 | 355 | val--; |
paul@98 | 356 | if ( val > 0x1f ) { |
paul@98 | 357 | val = 0x1f; |
paul@98 | 358 | } |
paul@98 | 359 | #endif |
paul@98 | 360 | __cpm_set_ldiv( val ); |
paul@98 | 361 | REG_CPM_CPCCR |= CPM_CPCCR_CE ; /* update divide */ |
paul@98 | 362 | } |
paul@98 | 363 | |
paul@96 | 364 | static int jz_lcd_hw_init(vidinfo_t *vid) |
paul@33 | 365 | { |
paul@221 | 366 | struct jzfb_info *jzfb = vid->jz_fb; |
paul@221 | 367 | struct jz_mem_info *fbi = &vid->jz_mem; |
paul@217 | 368 | uint32_t val = 0; |
paul@221 | 369 | uint32_t pclk = jz_lcd_get_pixel_clock(vid); |
paul@33 | 370 | |
paul@33 | 371 | /* Setting Control register */ |
paul@221 | 372 | switch (jzfb->bpp) { |
paul@33 | 373 | case 1: |
paul@33 | 374 | val |= LCD_CTRL_BPP_1; |
paul@33 | 375 | break; |
paul@33 | 376 | case 2: |
paul@33 | 377 | val |= LCD_CTRL_BPP_2; |
paul@33 | 378 | break; |
paul@33 | 379 | case 4: |
paul@33 | 380 | val |= LCD_CTRL_BPP_4; |
paul@33 | 381 | break; |
paul@33 | 382 | case 8: |
paul@33 | 383 | val |= LCD_CTRL_BPP_8; |
paul@33 | 384 | break; |
paul@33 | 385 | case 15: |
paul@33 | 386 | val |= LCD_CTRL_RGB555; |
paul@33 | 387 | case 16: |
paul@33 | 388 | val |= LCD_CTRL_BPP_16; |
paul@33 | 389 | break; |
paul@43 | 390 | #ifndef CONFIG_CPU_JZ4730 |
paul@33 | 391 | case 17 ... 32: |
paul@33 | 392 | val |= LCD_CTRL_BPP_18_24; /* target is 4bytes/pixel */ |
paul@33 | 393 | break; |
paul@43 | 394 | #endif |
paul@33 | 395 | default: |
paul@221 | 396 | /* printf("jz_lcd.c The BPP %d is not supported\n", jzfb->bpp); */ |
paul@33 | 397 | val |= LCD_CTRL_BPP_16; |
paul@33 | 398 | break; |
paul@33 | 399 | } |
paul@33 | 400 | |
paul@221 | 401 | switch (jzfb->cfg & MODE_MASK) { |
paul@33 | 402 | case MODE_STN_MONO_DUAL: |
paul@33 | 403 | case MODE_STN_COLOR_DUAL: |
paul@221 | 404 | val |= jz_lcd_stn_init(jzfb->h >> 1, vid); |
paul@33 | 405 | break; |
paul@33 | 406 | |
paul@33 | 407 | case MODE_STN_MONO_SINGLE: |
paul@33 | 408 | case MODE_STN_COLOR_SINGLE: |
paul@221 | 409 | val |= jz_lcd_stn_init(jzfb->h, vid); |
paul@33 | 410 | break; |
paul@33 | 411 | |
paul@33 | 412 | case MODE_TFT_GEN: |
paul@33 | 413 | case MODE_TFT_CASIO: |
paul@33 | 414 | case MODE_8BIT_SERIAL_TFT: |
paul@33 | 415 | case MODE_TFT_18BIT: |
paul@221 | 416 | jz_lcd_tft_init(vid); |
paul@33 | 417 | break; |
paul@33 | 418 | |
paul@33 | 419 | case MODE_TFT_SAMSUNG: |
paul@33 | 420 | { |
paul@221 | 421 | jz_lcd_samsung_init(pclk, vid); |
paul@33 | 422 | break; |
paul@33 | 423 | } |
paul@96 | 424 | |
paul@33 | 425 | case MODE_TFT_SHARP: |
paul@33 | 426 | { |
paul@221 | 427 | jz_lcd_sharp_init(vid); |
paul@33 | 428 | break; |
paul@33 | 429 | } |
paul@96 | 430 | |
paul@96 | 431 | default: |
paul@33 | 432 | break; |
paul@33 | 433 | } |
paul@33 | 434 | |
paul@33 | 435 | /* Configure the LCD panel */ |
paul@96 | 436 | |
paul@96 | 437 | val |= LCD_CTRL_BST_16; /* Burst Length is 16WORD=64Byte */ |
paul@96 | 438 | val |= LCD_CTRL_OFUP; /* OutFIFO underrun protect */ |
paul@96 | 439 | REG_LCD_CTRL = val; |
paul@221 | 440 | REG_LCD_CFG = jzfb->cfg; |
paul@33 | 441 | |
paul@98 | 442 | /* Timing reset. */ |
paul@33 | 443 | |
paul@98 | 444 | __cpm_stop_lcd(); |
paul@98 | 445 | jz_lcd_set_timing(pclk); |
paul@33 | 446 | __cpm_start_lcd(); |
paul@33 | 447 | udelay(1000); |
paul@33 | 448 | |
paul@96 | 449 | /* Configure DMA. */ |
paul@96 | 450 | |
paul@217 | 451 | REG_LCD_DA0 = (uint32_t) fbi->fdadr0; /* frame descriptor */ |
paul@33 | 452 | |
paul@221 | 453 | if (((jzfb->cfg & MODE_MASK) == MODE_STN_COLOR_DUAL) || |
paul@221 | 454 | ((jzfb->cfg & MODE_MASK) == MODE_STN_MONO_DUAL)) |
paul@217 | 455 | REG_LCD_DA1 = (uint32_t) fbi->fdadr1; /* frame descriptor */ |
paul@33 | 456 | |
paul@33 | 457 | return 0; |
paul@33 | 458 | } |
paul@33 | 459 | |
paul@102 | 460 | /* Public operations. */ |
paul@102 | 461 | |
paul@217 | 462 | void lcd_set_bpp(uint8_t bpp) |
paul@106 | 463 | { |
paul@221 | 464 | vidinfo_t *vid = &panel_info; |
paul@221 | 465 | struct jzfb_info *jzfb = vid->jz_fb; |
paul@221 | 466 | jzfb->bpp = bpp; |
paul@106 | 467 | } |
paul@106 | 468 | |
paul@195 | 469 | void lcd_enable() |
paul@33 | 470 | { |
paul@102 | 471 | /* Clear the disable bit and set the enable bit. */ |
paul@102 | 472 | |
paul@102 | 473 | REG_LCD_CTRL &= ~(1<<4); /* LCDCTRL.DIS */ |
paul@102 | 474 | REG_LCD_CTRL |= 1<<3; /* LCDCTRL.ENA*/ |
paul@101 | 475 | } |
paul@101 | 476 | |
paul@195 | 477 | void lcd_disable() |
paul@101 | 478 | { |
paul@102 | 479 | REG_LCD_CTRL |= (1<<4); /* LCDCTRL.DIS, regular disable */ |
paul@102 | 480 | } |
paul@102 | 481 | |
paul@195 | 482 | void lcd_quick_disable() |
paul@102 | 483 | { |
paul@102 | 484 | REG_LCD_CTRL &= ~(1<<4); /* LCDCTRL.ENA, quick disable */ |
paul@102 | 485 | } |
paul@102 | 486 | |
paul@217 | 487 | static inline uint16_t rgb8_to_rgb16(uint8_t rgb) |
paul@102 | 488 | { |
paul@103 | 489 | return ((((rgb & 0xe0) >> 5) * 4) << 11) | ((((rgb & 0x1c) >> 2) * 9) << 6) | ((rgb & 0x03) * 10); |
paul@103 | 490 | } |
paul@103 | 491 | |
paul@217 | 492 | static inline uint16_t rgb4_to_rgb16(uint8_t rgb) |
paul@103 | 493 | { |
paul@103 | 494 | return ((((rgb & 8) >> 3) * 0x1f) << 11) | ((((rgb & 6) >> 1) * 0x15) << 5) | ((rgb & 1) * 0x1f); |
paul@102 | 495 | } |
paul@102 | 496 | |
paul@102 | 497 | static void lcd_init_palette(vidinfo_t *vid) |
paul@102 | 498 | { |
paul@221 | 499 | uint16_t *palette = (uint16_t *) lcd_get_palette(get_memory_size(), vid); |
paul@221 | 500 | uint16_t *end = (uint16_t *) palette + (1 << (vid->jz_fb->bpp)); |
paul@217 | 501 | uint8_t value = 0; |
paul@102 | 502 | |
paul@102 | 503 | while (palette < end) |
paul@102 | 504 | { |
paul@221 | 505 | switch (vid->jz_fb->bpp) |
paul@103 | 506 | { |
paul@221 | 507 | case 4: |
paul@103 | 508 | *palette = rgb4_to_rgb16(value); |
paul@103 | 509 | break; |
paul@103 | 510 | |
paul@221 | 511 | case 8: |
paul@103 | 512 | default: |
paul@103 | 513 | *palette = rgb8_to_rgb16(value); |
paul@103 | 514 | break; |
paul@103 | 515 | } |
paul@103 | 516 | |
paul@102 | 517 | value++; |
paul@102 | 518 | palette++; |
paul@102 | 519 | } |
paul@33 | 520 | } |
paul@33 | 521 | |
paul@217 | 522 | uint32_t lcd_ctrl_init() |
paul@33 | 523 | { |
paul@221 | 524 | vidinfo_t *vid = &panel_info; |
paul@221 | 525 | struct jz_mem_info *fbi = &vid->jz_mem; |
paul@101 | 526 | |
paul@101 | 527 | /* Start from the top of memory and obtain palette and framebuffer regions. */ |
paul@101 | 528 | |
paul@221 | 529 | fbi->screen = lcd_get_framebuffer(get_memory_size(), 0, vid); |
paul@221 | 530 | fbi->palette = lcd_get_palette(get_memory_size(), vid); |
paul@101 | 531 | |
paul@221 | 532 | if (vid->jz_fb->bpp < 12) |
paul@221 | 533 | lcd_init_palette(vid); |
paul@101 | 534 | |
paul@221 | 535 | jz_lcd_desc_init(vid); |
paul@221 | 536 | jz_lcd_hw_init(vid); |
paul@101 | 537 | |
paul@101 | 538 | return fbi->screen; |
paul@33 | 539 | } |