1.1 --- a/stage2/head2.S Tue Jun 30 16:09:27 2015 +0200
1.2 +++ b/stage2/head2.S Tue Jun 30 16:10:40 2015 +0200
1.3 @@ -20,6 +20,8 @@
1.4 * along with this program. If not, see <http://www.gnu.org/licenses/>.
1.5 */
1.6
1.7 +#include "sdram.h"
1.8 +
1.9 .text
1.10 .extern c_main
1.11 .extern _tlb_entry
1.12 @@ -87,22 +89,10 @@
1.13 bne $t0, $t2, _irq_copy
1.14 addiu $t1, $t1, 4 /* executed in delay slot before branch */
1.15
1.16 - /* Initialise interrupts. */
1.17 + /* Enable caching. */
1.18
1.19 - mfc0 $t3, $12 /* CP0_STATUS */
1.20 - nop
1.21 - li $t4, 0xffbf00e0 /* BEV = 0 (not bootloader vectors); IM = disable all */
1.22 - and $t3, $t3, $t4 /* ... KSU = 0 (kernel mode); ERL = 0; EXL = 0; IE = 0 */
1.23 - li $t4, 0x0000ff04 /* IM = enable IM7..IM0; ERL = 1 (set by default) */
1.24 - or $t3, $t3, $t4
1.25 - mtc0 $t3, $12
1.26 - nop
1.27 -
1.28 - li $t3, 0x00800000 /* IV = 1 (use 0x80000200 for interrupts) */
1.29 - mtc0 $t3, $13 /* CP0_CAUSE */
1.30 - nop
1.31 -
1.32 - mtc0 $zero, $15 /* CP0_EBASE (should be zero anyway) */
1.33 + li $t0, CONFIG_CM_CACHABLE_NONCOHERENT
1.34 + mtc0 $t0, $16 /* CP0_CONFIG */
1.35 nop
1.36
1.37 /* Start the program. */