1.1 --- a/stage2/lcd.c Sun Jul 09 19:04:49 2017 +0200
1.2 +++ b/stage2/lcd.c Tue Jul 11 00:03:30 2017 +0200
1.3 @@ -24,6 +24,7 @@
1.4 #include "jzlcd.h"
1.5 #include "sdram.h"
1.6 #include "cpu.h"
1.7 +#include "cpm.h"
1.8 #include "board.h"
1.9
1.10 extern vidinfo_t panel_info;
1.11 @@ -262,76 +263,14 @@
1.12
1.13 /* LCD initialisation. */
1.14
1.15 -#ifdef CONFIG_CPU_JZ4730
1.16 -void jz4730_set_lcd_frequencies(uint32_t pclk, uint8_t ratio)
1.17 -{
1.18 - uint32_t val;
1.19 -
1.20 - val = __cpm_get_pllout() / pclk;
1.21 - REG_CPM_CFCR2 = val - 1;
1.22 - val = pclk * ratio;
1.23 -
1.24 - if (val > 150000000) {
1.25 - val = 150000000;
1.26 - }
1.27 -
1.28 - val = __cpm_get_pllout() / val;
1.29 - val--;
1.30 -
1.31 - if (val > 0xF)
1.32 - val = 0xF;
1.33 -
1.34 - __cpm_set_ldiv(val);
1.35 - REG_CPM_CPCCR = REG_CPM_CPCCR | CPM_CPCCR_CE; /* update divide */
1.36 -}
1.37 -#else
1.38 -void jz4740_set_lcd_frequencies(uint32_t pclk, uint8_t ratio)
1.39 -{
1.40 - uint32_t val;
1.41 - int pll_div;
1.42 -
1.43 - pll_div = REG_CPM_CPCCR & CPM_CPCCR_PCS; /* clock source,0:pllout/2 1: pllout */
1.44 - pll_div = pll_div ? 1 : 2;
1.45 - val = (__cpm_get_pllout() / pll_div) / pclk;
1.46 - val--;
1.47 -
1.48 - if ( val > 0x1ff ) {
1.49 - val = 0x1ff;
1.50 - }
1.51 -
1.52 - __cpm_set_pixdiv(val);
1.53 -
1.54 - val = pclk * ratio; /* LCDClock > 2.5*Pixclock */
1.55 -
1.56 - if ( val > 150000000 ) {
1.57 - val = 150000000;
1.58 - }
1.59 -
1.60 - val = (__cpm_get_pllout() / pll_div) / val;
1.61 - val--;
1.62 -
1.63 - if (val > 0x1f)
1.64 - val = 0x1f;
1.65 -
1.66 - __cpm_set_ldiv(val);
1.67 - REG_CPM_CPCCR = REG_CPM_CPCCR | CPM_CPCCR_CE; /* update divide */
1.68 -}
1.69 -#endif
1.70 -
1.71 void lcd_set_timing(vidinfo_t *vid)
1.72 {
1.73 uint32_t pclk = jz4740_lcd_get_pixel_clock(vid);
1.74
1.75 - __cpm_stop_lcd();
1.76 -
1.77 -#ifdef CONFIG_CPU_JZ4730
1.78 - jz4730_set_lcd_frequencies(pclk, 4);
1.79 -#else
1.80 - jz4740_set_lcd_frequencies(pclk, 3);
1.81 -#endif
1.82 -
1.83 - __cpm_start_lcd();
1.84 - udelay(1000);
1.85 + jz4740_cpm_stop_lcd((void *) CPM_BASE);
1.86 + jz4740_cpm_set_lcd_frequencies((void *) CPM_BASE, pclk, 3);
1.87 + jz4740_cpm_start_lcd((void *) CPM_BASE);
1.88 + udelay(1000);
1.89 }
1.90
1.91 static void lcd_display_pin_init()
1.92 @@ -374,7 +313,7 @@
1.93
1.94 fb_vaddr = (void *) (get_memory_size() - jz4740_lcd_get_total_size(vid));
1.95
1.96 - jz4740_lcd_ctrl_init((void *) LCD_BASE_KSEG1, fb_vaddr, vid);
1.97 + jz4740_lcd_ctrl_init((void *) LCD_BASE, fb_vaddr, vid);
1.98 flush_cache_all();
1.99 jz4740_lcd_hw_init(vid);
1.100 lcd_set_timing(vid);