1.1 --- /dev/null Thu Jan 01 00:00:00 1970 +0000
1.2 +++ b/nanonote_gpm940b0.h Sat Jun 06 23:29:51 2015 +0200
1.3 @@ -0,0 +1,135 @@
1.4 +/*
1.5 + * JzRISC lcd controller
1.6 + *
1.7 + * Xiangfu Liu <xiangfu@sharism.cc>
1.8 + *
1.9 + * This program is free software; you can redistribute it and/or
1.10 + * modify it under the terms of the GNU General Public License as
1.11 + * published by the Free Software Foundation; either version 2 of
1.12 + * the License, or (at your option) any later version.
1.13 + *
1.14 + * This program is distributed in the hope that it will be useful,
1.15 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
1.16 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
1.17 + * GNU General Public License for more details.
1.18 + *
1.19 + * You should have received a copy of the GNU General Public License
1.20 + * along with this program; if not, write to the Free Software
1.21 + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
1.22 + * MA 02111-1307 USA
1.23 + */
1.24 +
1.25 +#ifndef __QI_LB60_GPM940B0_H__
1.26 +#define __QI_LB60_GPM940B0_H__
1.27 +
1.28 +struct lcd_desc{
1.29 + unsigned int next_desc; /* LCDDAx */
1.30 + unsigned int databuf; /* LCDSAx */
1.31 + unsigned int frame_id; /* LCDFIDx */
1.32 + unsigned int cmd; /* LCDCMDx */
1.33 +};
1.34 +
1.35 +#define MODE_MASK 0x0f
1.36 +#define MODE_TFT_GEN 0x00
1.37 +#define MODE_TFT_SHARP 0x01
1.38 +#define MODE_TFT_CASIO 0x02
1.39 +#define MODE_TFT_SAMSUNG 0x03
1.40 +#define MODE_CCIR656_NONINT 0x04
1.41 +#define MODE_CCIR656_INT 0x05
1.42 +#define MODE_STN_COLOR_SINGLE 0x08
1.43 +#define MODE_STN_MONO_SINGLE 0x09
1.44 +#define MODE_STN_COLOR_DUAL 0x0a
1.45 +#define MODE_STN_MONO_DUAL 0x0b
1.46 +#define MODE_8BIT_SERIAL_TFT 0x0c
1.47 +
1.48 +#define MODE_TFT_18BIT (1<<7)
1.49 +
1.50 +#define STN_DAT_PIN1 (0x00 << 4)
1.51 +#define STN_DAT_PIN2 (0x01 << 4)
1.52 +#define STN_DAT_PIN4 (0x02 << 4)
1.53 +#define STN_DAT_PIN8 (0x03 << 4)
1.54 +#define STN_DAT_PINMASK STN_DAT_PIN8
1.55 +
1.56 +#define STFT_PSHI (1 << 15)
1.57 +#define STFT_CLSHI (1 << 14)
1.58 +#define STFT_SPLHI (1 << 13)
1.59 +#define STFT_REVHI (1 << 12)
1.60 +
1.61 +#define SYNC_MASTER (0 << 16)
1.62 +#define SYNC_SLAVE (1 << 16)
1.63 +
1.64 +#define DE_P (0 << 9)
1.65 +#define DE_N (1 << 9)
1.66 +
1.67 +#define PCLK_P (0 << 10)
1.68 +#define PCLK_N (1 << 10)
1.69 +
1.70 +#define HSYNC_P (0 << 11)
1.71 +#define HSYNC_N (1 << 11)
1.72 +
1.73 +#define VSYNC_P (0 << 8)
1.74 +#define VSYNC_N (1 << 8)
1.75 +
1.76 +#define DATA_NORMAL (0 << 17)
1.77 +#define DATA_INVERSE (1 << 17)
1.78 +
1.79 +
1.80 +/* Jz LCDFB supported I/O controls. */
1.81 +#define FBIOSETBACKLIGHT 0x4688
1.82 +#define FBIODISPON 0x4689
1.83 +#define FBIODISPOFF 0x468a
1.84 +#define FBIORESET 0x468b
1.85 +#define FBIOPRINT_REG 0x468c
1.86 +
1.87 +/*
1.88 + * LCD panel specific definition
1.89 + */
1.90 +#define MODE (0xc9) /* 8bit serial RGB */
1.91 +
1.92 +#define __spi_write_reg1(reg, val) \
1.93 +do { \
1.94 + unsigned char no; \
1.95 + unsigned short value; \
1.96 + unsigned char a=reg; \
1.97 + unsigned char b=val; \
1.98 + __gpio_set_pin(SPEN); \
1.99 + __gpio_set_pin(SPCK); \
1.100 + __gpio_clear_pin(SPDA); \
1.101 + __gpio_clear_pin(SPEN); \
1.102 + value=((a<<8)|(b&0xFF)); \
1.103 + for(no=0;no<16;no++) \
1.104 + { \
1.105 + __gpio_clear_pin(SPCK); \
1.106 + if((value&0x8000)==0x8000) \
1.107 + __gpio_set_pin(SPDA); \
1.108 + else \
1.109 + __gpio_clear_pin(SPDA); \
1.110 + __gpio_set_pin(SPCK); \
1.111 + value=(value<<1); \
1.112 + } \
1.113 + __gpio_set_pin(SPEN); \
1.114 +} while (0)
1.115 +
1.116 +#define __lcd_display_pin_init() \
1.117 +do { \
1.118 + __cpm_start_tcu(); \
1.119 + __gpio_as_output(SPEN); /* use SPDA */ \
1.120 + __gpio_as_output(SPCK); /* use SPCK */ \
1.121 + __gpio_as_output(SPDA); /* use SPDA */ \
1.122 +} while (0)
1.123 +
1.124 +#define __lcd_display_on() \
1.125 +do { \
1.126 + __spi_write_reg1(0x05, 0x1e); \
1.127 + __spi_write_reg1(0x05, 0x5e); \
1.128 + __spi_write_reg1(0x07, 0x8d); \
1.129 + __spi_write_reg1(0x13, 0x01); \
1.130 + __spi_write_reg1(0x05, 0x5f); \
1.131 +} while (0)
1.132 +
1.133 +#define __lcd_display_off() \
1.134 +do { \
1.135 + __spi_write_reg1(0x05, 0x5e); \
1.136 +} while (0)
1.137 +
1.138 +#endif /* __QI_LB60_GPM940B0_H__ */