1.1 --- /dev/null Thu Jan 01 00:00:00 1970 +0000
1.2 +++ b/stage2/head2.S Sun Jun 07 23:06:08 2015 +0200
1.3 @@ -0,0 +1,33 @@
1.4 +/*
1.5 + * Entry point of the firmware.
1.6 + * The firmware code are executed in the ICache.
1.7 + * Do not edit!
1.8 + * Copyright (C) 2006 Ingenic Semiconductor Inc.
1.9 + *
1.10 + */
1.11 +
1.12 + .text
1.13 + .extern c_main
1.14 +
1.15 + .globl _start
1.16 + .set noreorder
1.17 +_start:
1.18 + b real_start
1.19 + nop
1.20 + .word 0x0 // its address == start address + 8
1.21 + .word 0x0
1.22 + .word 0x0
1.23 + .word 0x0
1.24 + .word 0x0
1.25 + .word 0x0
1.26 + .word 0x0
1.27 + .word 0x0
1.28 +
1.29 +real_start:
1.30 + /* setup stack, jump to C code */
1.31 + add $29, $20, 0x3ffff0 // sp locate at start address offset 0x2ffff0
1.32 + add $25, $20, 0x40 // t9 = c_main()
1.33 + j $25
1.34 + nop
1.35 +
1.36 + .set reorder