1.1 --- /dev/null Thu Jan 01 00:00:00 1970 +0000
1.2 +++ b/stage2/stage2.ld Sun Jun 07 23:06:08 2015 +0200
1.3 @@ -0,0 +1,32 @@
1.4 +OUTPUT_ARCH(mips)
1.5 +ENTRY(_start)
1.6 +MEMORY
1.7 +{
1.8 + ram : ORIGIN = 0x80000000 , LENGTH = 3M
1.9 +}
1.10 +
1.11 +SECTIONS
1.12 +{
1.13 + . = ALIGN(4);
1.14 + .text : { *(.text*) } > ram
1.15 +
1.16 + . = ALIGN(4);
1.17 + .rodata : { *(.rodata*) } > ram
1.18 +
1.19 + . = ALIGN(4);
1.20 + .sdata : { *(.sdata*) } > ram
1.21 +
1.22 + . = ALIGN(4);
1.23 + .data : { *(.data*) *(.scommon*) *(.reginfo*) } > ram
1.24 +
1.25 + _gp = ALIGN(16);
1.26 +
1.27 + .got : { *(.got*) } > ram
1.28 + _got_end = ABSOLUTE(.);
1.29 +
1.30 + . = ALIGN(4);
1.31 + .sbss : { *(.sbss*) } > ram
1.32 + .bss : { *(.bss*) } > ram
1.33 + . = ALIGN (4);
1.34 +}
1.35 +