stage2/minipc_claa070vc01.c | raw changeset files shortlog |
1.1 --- a/stage2/minipc_claa070vc01.c Sat Jul 08 23:02:30 2017 +0200 1.2 +++ b/stage2/minipc_claa070vc01.c Sun Jul 09 00:36:42 2017 +0200 1.3 @@ -30,5 +30,6 @@ 1.4 }; 1.5 1.6 vidinfo_t panel_info = { 1.7 - .jz_fb=&jzfb // this will need correcting for user mode usage 1.8 + .jz_fb=&jzfb, // this will need correcting for user mode usage 1.9 + .lcd=0, // base address for registers 1.10 };