1.1 --- a/stage2/nanonote_gpm940b0.c Tue Jun 09 00:03:27 2015 +0200
1.2 +++ b/stage2/nanonote_gpm940b0.c Tue Jun 09 21:10:40 2015 +0200
1.3 @@ -1,5 +1,5 @@
1.4 /*
1.5 - * JzRISC lcd controller
1.6 + * Ben NanoNote screen details
1.7 *
1.8 * Copyright (C) Xiangfu Liu <xiangfu@sharism.cc>
1.9 * Copyright (C) 2015 Paul Boddie <paul@boddie.org.uk>
1.10 @@ -20,33 +20,10 @@
1.11 * MA 02111-1307 USA
1.12 */
1.13
1.14 -/* virt_to_phys() from u-boot/arch/mips/include/asm/addrspace.h
1.15 - via u-boot/arch/mips/include/asm/io.h */
1.16 -/* #define virt_to_phys(n) (((int) n) & 0x1fffffff) */
1.17 -#define virt_to_phys(n) ((int) n)
1.18 -
1.19 #include "nanonote_gpm940b0.h"
1.20 -#include "board-nanonote.h"
1.21 -
1.22 -#define align2(n) (n)=((((n)+1)>>1)<<1)
1.23 -#define align4(n) (n)=((((n)+3)>>2)<<2)
1.24 -#define align8(n) (n)=((((n)+7)>>3)<<3)
1.25 +#include "jzlcd.h"
1.26
1.27 -struct jzfb_info {
1.28 - unsigned int cfg; /* panel mode and pin usage etc. */
1.29 - unsigned int w;
1.30 - unsigned int h;
1.31 - unsigned int bpp; /* bit per pixel */
1.32 - unsigned int fclk; /* frame clk */
1.33 - unsigned int hsw; /* hsync width, in pclk */
1.34 - unsigned int vsw; /* vsync width, in line count */
1.35 - unsigned int elw; /* end of line, in pclk */
1.36 - unsigned int blw; /* begin of line, in pclk */
1.37 - unsigned int efw; /* end of frame, in line count */
1.38 - unsigned int bfw; /* begin of frame, in line count */
1.39 -};
1.40 -
1.41 -static struct jzfb_info jzfb = {
1.42 +struct jzfb_info jzfb = {
1.43 MODE_8BIT_SERIAL_TFT | PCLK_N | HSYNC_N | VSYNC_N,
1.44 320, 240, 32, 70, 1, 1, 273, 140, 1, 20
1.45 };
1.46 @@ -54,350 +31,3 @@
1.47 vidinfo_t panel_info = {
1.48 320, 240, LCD_BPP,
1.49 };
1.50 -
1.51 -unsigned long lcd_get_size(void)
1.52 -{
1.53 - int line_length = (panel_info.vl_col * NBITS(panel_info.vl_bpix)) / 8;
1.54 - return line_length * panel_info.vl_row;
1.55 -}
1.56 -
1.57 -static int jz_lcd_init_mem(void *lcdbase, vidinfo_t *vid);
1.58 -static void jz_lcd_desc_init(vidinfo_t *vid);
1.59 -static int jz_lcd_hw_init(vidinfo_t *vid);
1.60 -
1.61 -void lcd_ctrl_init (void *lcdbase)
1.62 -{
1.63 - jz_lcd_init_mem(lcdbase, &panel_info);
1.64 - jz_lcd_desc_init(&panel_info);
1.65 - jz_lcd_hw_init(&panel_info);
1.66 -}
1.67 -
1.68 -/*
1.69 - * Before enabled lcd controller, lcd registers should be configured correctly.
1.70 - */
1.71 -void lcd_enable (void)
1.72 -{
1.73 - REG_LCD_CTRL &= ~(1<<4); /* LCDCTRL.DIS */
1.74 - REG_LCD_CTRL |= 1<<3; /* LCDCTRL.ENA*/
1.75 -}
1.76 -
1.77 -void lcd_disable (void)
1.78 -{
1.79 - REG_LCD_CTRL |= (1<<4); /* LCDCTRL.DIS, regular disable */
1.80 - /* REG_LCD_CTRL |= (1<<3); */ /* LCDCTRL.DIS, quikly disable */
1.81 -}
1.82 -
1.83 -static int jz_lcd_init_mem(void *lcdbase, vidinfo_t *vid)
1.84 -{
1.85 - unsigned long palette_mem_size;
1.86 - struct jz_fb_info *fbi = &vid->jz_fb;
1.87 - int fb_size = vid->vl_row * (vid->vl_col * NBITS (vid->vl_bpix)) / 8;
1.88 -
1.89 - fbi->screen = (unsigned long)lcdbase;
1.90 - fbi->palette_size = 256;
1.91 - palette_mem_size = fbi->palette_size * sizeof(u16);
1.92 -
1.93 - /* debug("jz_lcd.c palette_mem_size = 0x%08lx\n", (unsigned long) palette_mem_size); */
1.94 - /* locate palette and descs at end of page following fb */
1.95 - fbi->palette = (unsigned long)lcdbase + fb_size + PAGE_SIZE - palette_mem_size;
1.96 -
1.97 - return 0;
1.98 -}
1.99 -
1.100 -static void jz_lcd_desc_init(vidinfo_t *vid)
1.101 -{
1.102 - struct jz_fb_info * fbi;
1.103 - fbi = &vid->jz_fb;
1.104 - fbi->dmadesc_fblow = (struct jz_fb_dma_descriptor *)((unsigned int)fbi->palette - 3*16);
1.105 - fbi->dmadesc_fbhigh = (struct jz_fb_dma_descriptor *)((unsigned int)fbi->palette - 2*16);
1.106 - fbi->dmadesc_palette = (struct jz_fb_dma_descriptor *)((unsigned int)fbi->palette - 1*16);
1.107 -
1.108 - #define BYTES_PER_PANEL (vid->vl_col * vid->vl_row * NBITS(vid->vl_bpix) / 8)
1.109 -
1.110 - /* populate descriptors */
1.111 - fbi->dmadesc_fblow->fdadr = virt_to_phys(fbi->dmadesc_fblow);
1.112 - fbi->dmadesc_fblow->fsadr = virt_to_phys((void *)(fbi->screen + BYTES_PER_PANEL));
1.113 - fbi->dmadesc_fblow->fidr = 0;
1.114 - fbi->dmadesc_fblow->ldcmd = BYTES_PER_PANEL / 4 ;
1.115 -
1.116 - fbi->fdadr1 = virt_to_phys(fbi->dmadesc_fblow); /* only used in dual-panel mode */
1.117 -
1.118 - fbi->dmadesc_fbhigh->fsadr = virt_to_phys((void *)fbi->screen);
1.119 - fbi->dmadesc_fbhigh->fidr = 0;
1.120 - fbi->dmadesc_fbhigh->ldcmd = BYTES_PER_PANEL / 4; /* length in word */
1.121 -
1.122 - fbi->dmadesc_palette->fsadr = virt_to_phys((void *)fbi->palette);
1.123 - fbi->dmadesc_palette->fidr = 0;
1.124 - fbi->dmadesc_palette->ldcmd = (fbi->palette_size * 2)/4 | (1<<28);
1.125 -
1.126 - if(NBITS(vid->vl_bpix) < 12)
1.127 - {
1.128 - /* assume any mode with <12 bpp is palette driven */
1.129 - fbi->dmadesc_palette->fdadr = virt_to_phys(fbi->dmadesc_fbhigh);
1.130 - fbi->dmadesc_fbhigh->fdadr = virt_to_phys(fbi->dmadesc_palette);
1.131 - /* flips back and forth between pal and fbhigh */
1.132 - fbi->fdadr0 = virt_to_phys(fbi->dmadesc_palette);
1.133 - } else {
1.134 - /* palette shouldn't be loaded in true-color mode */
1.135 - fbi->dmadesc_fbhigh->fdadr = virt_to_phys((void *)fbi->dmadesc_fbhigh);
1.136 - fbi->fdadr0 = virt_to_phys(fbi->dmadesc_fbhigh); /* no pal just fbhigh */
1.137 - }
1.138 -
1.139 - flush_cache_all();
1.140 -}
1.141 -
1.142 -static int jz_lcd_hw_init(vidinfo_t *vid)
1.143 -{
1.144 - struct jz_fb_info *fbi = &vid->jz_fb;
1.145 - unsigned int val = 0;
1.146 - unsigned int pclk;
1.147 - unsigned int stnH;
1.148 - int pll_div;
1.149 -
1.150 - /* Setting Control register */
1.151 - switch (jzfb.bpp) {
1.152 - case 1:
1.153 - val |= LCD_CTRL_BPP_1;
1.154 - break;
1.155 - case 2:
1.156 - val |= LCD_CTRL_BPP_2;
1.157 - break;
1.158 - case 4:
1.159 - val |= LCD_CTRL_BPP_4;
1.160 - break;
1.161 - case 8:
1.162 - val |= LCD_CTRL_BPP_8;
1.163 - break;
1.164 - case 15:
1.165 - val |= LCD_CTRL_RGB555;
1.166 - case 16:
1.167 - val |= LCD_CTRL_BPP_16;
1.168 - break;
1.169 - case 17 ... 32:
1.170 - val |= LCD_CTRL_BPP_18_24; /* target is 4bytes/pixel */
1.171 - break;
1.172 -
1.173 - default:
1.174 - /* printf("jz_lcd.c The BPP %d is not supported\n", jzfb.bpp); */
1.175 - val |= LCD_CTRL_BPP_16;
1.176 - break;
1.177 - }
1.178 -
1.179 - switch (jzfb.cfg & MODE_MASK) {
1.180 - case MODE_STN_MONO_DUAL:
1.181 - case MODE_STN_COLOR_DUAL:
1.182 - case MODE_STN_MONO_SINGLE:
1.183 - case MODE_STN_COLOR_SINGLE:
1.184 - switch (jzfb.bpp) {
1.185 - case 1:
1.186 - /* val |= LCD_CTRL_PEDN; */
1.187 - case 2:
1.188 - val |= LCD_CTRL_FRC_2;
1.189 - break;
1.190 - case 4:
1.191 - val |= LCD_CTRL_FRC_4;
1.192 - break;
1.193 - case 8:
1.194 - default:
1.195 - val |= LCD_CTRL_FRC_16;
1.196 - break;
1.197 - }
1.198 - break;
1.199 - }
1.200 -
1.201 - val |= LCD_CTRL_BST_16; /* Burst Length is 16WORD=64Byte */
1.202 - val |= LCD_CTRL_OFUP; /* OutFIFO underrun protect */
1.203 -
1.204 - switch (jzfb.cfg & MODE_MASK) {
1.205 - case MODE_STN_MONO_DUAL:
1.206 - case MODE_STN_COLOR_DUAL:
1.207 - case MODE_STN_MONO_SINGLE:
1.208 - case MODE_STN_COLOR_SINGLE:
1.209 - switch (jzfb.cfg & STN_DAT_PINMASK) {
1.210 - case STN_DAT_PIN1:
1.211 - /* Do not adjust the hori-param value. */
1.212 - break;
1.213 - case STN_DAT_PIN2:
1.214 - align2(jzfb.hsw);
1.215 - align2(jzfb.elw);
1.216 - align2(jzfb.blw);
1.217 - break;
1.218 - case STN_DAT_PIN4:
1.219 - align4(jzfb.hsw);
1.220 - align4(jzfb.elw);
1.221 - align4(jzfb.blw);
1.222 - break;
1.223 - case STN_DAT_PIN8:
1.224 - align8(jzfb.hsw);
1.225 - align8(jzfb.elw);
1.226 - align8(jzfb.blw);
1.227 - break;
1.228 - }
1.229 - break;
1.230 - }
1.231 -
1.232 - REG_LCD_CTRL = val;
1.233 -
1.234 - switch (jzfb.cfg & MODE_MASK) {
1.235 - case MODE_STN_MONO_DUAL:
1.236 - case MODE_STN_COLOR_DUAL:
1.237 - case MODE_STN_MONO_SINGLE:
1.238 - case MODE_STN_COLOR_SINGLE:
1.239 - if (((jzfb.cfg & MODE_MASK) == MODE_STN_MONO_DUAL) ||
1.240 - ((jzfb.cfg & MODE_MASK) == MODE_STN_COLOR_DUAL))
1.241 - stnH = jzfb.h >> 1;
1.242 - else
1.243 - stnH = jzfb.h;
1.244 -
1.245 - REG_LCD_VSYNC = (0 << 16) | jzfb.vsw;
1.246 - REG_LCD_HSYNC = ((jzfb.blw+jzfb.w) << 16) | (jzfb.blw+jzfb.w+jzfb.hsw);
1.247 -
1.248 - /* Screen setting */
1.249 - REG_LCD_VAT = ((jzfb.blw + jzfb.w + jzfb.hsw + jzfb.elw) << 16) | (stnH + jzfb.vsw + jzfb.bfw + jzfb.efw);
1.250 - REG_LCD_DAH = (jzfb.blw << 16) | (jzfb.blw + jzfb.w);
1.251 - REG_LCD_DAV = (0 << 16) | (stnH);
1.252 -
1.253 - /* AC BIAs signal */
1.254 - REG_LCD_PS = (0 << 16) | (stnH+jzfb.vsw+jzfb.efw+jzfb.bfw);
1.255 -
1.256 - break;
1.257 -
1.258 - case MODE_TFT_GEN:
1.259 - case MODE_TFT_SHARP:
1.260 - case MODE_TFT_CASIO:
1.261 - case MODE_TFT_SAMSUNG:
1.262 - case MODE_8BIT_SERIAL_TFT:
1.263 - case MODE_TFT_18BIT:
1.264 - REG_LCD_VSYNC = (0 << 16) | jzfb.vsw;
1.265 - REG_LCD_HSYNC = (0 << 16) | jzfb.hsw;
1.266 - REG_LCD_DAV =((jzfb.vsw+jzfb.bfw) << 16) | (jzfb.vsw +jzfb.bfw+jzfb.h);
1.267 - REG_LCD_DAH = ((jzfb.hsw + jzfb.blw) << 16) | (jzfb.hsw + jzfb.blw + jzfb.w );
1.268 - REG_LCD_VAT = (((jzfb.blw + jzfb.w + jzfb.elw + jzfb.hsw)) << 16) \
1.269 - | (jzfb.vsw + jzfb.bfw + jzfb.h + jzfb.efw);
1.270 - break;
1.271 - }
1.272 -
1.273 - switch (jzfb.cfg & MODE_MASK) {
1.274 - case MODE_TFT_SAMSUNG:
1.275 - {
1.276 - unsigned int total, tp_s, tp_e, ckv_s, ckv_e;
1.277 - unsigned int rev_s, rev_e, inv_s, inv_e;
1.278 -
1.279 - pclk = val * (jzfb.w + jzfb.hsw + jzfb.elw + jzfb.blw) *
1.280 - (jzfb.h + jzfb.vsw + jzfb.efw + jzfb.bfw); /* Pixclk */
1.281 -
1.282 - total = jzfb.blw + jzfb.w + jzfb.elw + jzfb.hsw;
1.283 - tp_s = jzfb.blw + jzfb.w + 1;
1.284 - tp_e = tp_s + 1;
1.285 - /* ckv_s = tp_s - jz_clocks.pixclk/(1000000000/4100); */
1.286 - ckv_s = tp_s - pclk/(1000000000/4100);
1.287 - ckv_e = tp_s + total;
1.288 - rev_s = tp_s - 11; /* -11.5 clk */
1.289 - rev_e = rev_s + total;
1.290 - inv_s = tp_s;
1.291 - inv_e = inv_s + total;
1.292 - REG_LCD_CLS = (tp_s << 16) | tp_e;
1.293 - REG_LCD_PS = (ckv_s << 16) | ckv_e;
1.294 - REG_LCD_SPL = (rev_s << 16) | rev_e;
1.295 - REG_LCD_REV = (inv_s << 16) | inv_e;
1.296 - jzfb.cfg |= STFT_REVHI | STFT_SPLHI;
1.297 - break;
1.298 - }
1.299 - case MODE_TFT_SHARP:
1.300 - {
1.301 - unsigned int total, cls_s, cls_e, ps_s, ps_e;
1.302 - unsigned int spl_s, spl_e, rev_s, rev_e;
1.303 - total = jzfb.blw + jzfb.w + jzfb.elw + jzfb.hsw;
1.304 - spl_s = 1;
1.305 - spl_e = spl_s + 1;
1.306 - cls_s = 0;
1.307 - cls_e = total - 60; /* > 4us (pclk = 80ns) */
1.308 - ps_s = cls_s;
1.309 - ps_e = cls_e;
1.310 - rev_s = total - 40; /* > 3us (pclk = 80ns) */
1.311 - rev_e = rev_s + total;
1.312 - jzfb.cfg |= STFT_PSHI;
1.313 - REG_LCD_SPL = (spl_s << 16) | spl_e;
1.314 - REG_LCD_CLS = (cls_s << 16) | cls_e;
1.315 - REG_LCD_PS = (ps_s << 16) | ps_e;
1.316 - REG_LCD_REV = (rev_s << 16) | rev_e;
1.317 - break;
1.318 - }
1.319 - case MODE_TFT_CASIO:
1.320 - break;
1.321 - }
1.322 -
1.323 - /* Configure the LCD panel */
1.324 - REG_LCD_CFG = jzfb.cfg;
1.325 -
1.326 - /* Timing setting */
1.327 - __cpm_stop_lcd();
1.328 -
1.329 - val = jzfb.fclk; /* frame clk */
1.330 - if ( (jzfb.cfg & MODE_MASK) != MODE_8BIT_SERIAL_TFT) {
1.331 - pclk = val * (jzfb.w + jzfb.hsw + jzfb.elw + jzfb.blw) *
1.332 - (jzfb.h + jzfb.vsw + jzfb.efw + jzfb.bfw); /* Pixclk */
1.333 - } else {
1.334 - /* serial mode: Hsync period = 3*Width_Pixel */
1.335 - pclk = val * (jzfb.w*3 + jzfb.hsw + jzfb.elw + jzfb.blw) *
1.336 - (jzfb.h + jzfb.vsw + jzfb.efw + jzfb.bfw); /* Pixclk */
1.337 - }
1.338 -
1.339 - if (((jzfb.cfg & MODE_MASK) == MODE_STN_COLOR_SINGLE) ||
1.340 - ((jzfb.cfg & MODE_MASK) == MODE_STN_COLOR_DUAL))
1.341 - pclk = (pclk * 3);
1.342 -
1.343 - if (((jzfb.cfg & MODE_MASK) == MODE_STN_COLOR_SINGLE) ||
1.344 - ((jzfb.cfg & MODE_MASK) == MODE_STN_COLOR_DUAL) ||
1.345 - ((jzfb.cfg & MODE_MASK) == MODE_STN_MONO_SINGLE) ||
1.346 - ((jzfb.cfg & MODE_MASK) == MODE_STN_MONO_DUAL))
1.347 - pclk = pclk >> ((jzfb.cfg & STN_DAT_PINMASK) >> 4);
1.348 -
1.349 - if (((jzfb.cfg & MODE_MASK) == MODE_STN_COLOR_DUAL) ||
1.350 - ((jzfb.cfg & MODE_MASK) == MODE_STN_MONO_DUAL))
1.351 - pclk >>= 1;
1.352 -
1.353 - pll_div = ( REG_CPM_CPCCR & CPM_CPCCR_PCS ); /* clock source,0:pllout/2 1: pllout */
1.354 - pll_div = pll_div ? 1 : 2 ;
1.355 - val = ( __cpm_get_pllout()/pll_div ) / pclk;
1.356 - val--;
1.357 - if ( val > 0x1ff ) {
1.358 - /* printf("CPM_LPCDR too large, set it to 0x1ff\n"); */
1.359 - val = 0x1ff;
1.360 - }
1.361 - __cpm_set_pixdiv(val);
1.362 -
1.363 - val = pclk * 3 ; /* LCDClock > 2.5*Pixclock */
1.364 - if ( val > 150000000 ) {
1.365 - /* printf("Warning: LCDClock=%d\n, LCDClock must less or equal to 150MHz.\n", val); */
1.366 - /* printf("Change LCDClock to 150MHz\n"); */
1.367 - val = 150000000;
1.368 - }
1.369 - val = ( __cpm_get_pllout()/pll_div ) / val;
1.370 - val--;
1.371 - if ( val > 0x1f ) {
1.372 - /* printf("CPM_CPCCR.LDIV too large, set it to 0x1f\n"); */
1.373 - val = 0x1f;
1.374 - }
1.375 - __cpm_set_ldiv( val );
1.376 - REG_CPM_CPCCR |= CPM_CPCCR_CE ; /* update divide */
1.377 -
1.378 - __cpm_start_lcd();
1.379 - udelay(1000);
1.380 -
1.381 - REG_LCD_DA0 = fbi->fdadr0; /* frame descripter*/
1.382 -
1.383 - if (((jzfb.cfg & MODE_MASK) == MODE_STN_COLOR_DUAL) ||
1.384 - ((jzfb.cfg & MODE_MASK) == MODE_STN_MONO_DUAL))
1.385 - REG_LCD_DA1 = fbi->fdadr1; /* frame descripter*/
1.386 -
1.387 - return 0;
1.388 -}
1.389 -
1.390 -void lcd_setcolreg (unsigned short regno, unsigned short red, unsigned short green, unsigned short blue)
1.391 -{
1.392 -}
1.393 -
1.394 -void lcd_initcolregs (void)
1.395 -{
1.396 -}