stage2/cpu.c | raw changeset files shortlog | stage2-non-pic |
1.1 --- a/stage2/cpu.c Sat Dec 05 18:17:38 2015 +0100 1.2 +++ b/stage2/cpu.c Sat Dec 05 19:40:53 2015 +0100 1.3 @@ -108,7 +108,11 @@ 1.4 "li $t3, 0x00800000\n" /* IV = 1 (use 0x80000200 for interrupts) */ 1.5 "mtc0 $t3, $13\n" /* CP0_CAUSE */ 1.6 "nop\n" 1.7 - "mtc0 $zero, $12\n" /* CP0_STATUS */ 1.8 + "mfc0 $t3, $12\n" /* CP0_STATUS */ 1.9 + "nop\n" 1.10 + "li $t4, 0xffbfffff\n" /* BEV=0 */ 1.11 + "and $t3, $t3, $t4\n" 1.12 + "mtc0 $t3, $12\n" 1.13 "nop\n"); 1.14 } 1.15