1.1 --- a/stage2/stage2.ld Sat Jun 13 00:06:18 2015 +0200
1.2 +++ b/stage2/stage2.ld Sun Jun 14 01:44:49 2015 +0200
1.3 @@ -2,7 +2,7 @@
1.4 ENTRY(_start)
1.5 MEMORY
1.6 {
1.7 - ram : ORIGIN = 0x80000000 , LENGTH = 3M
1.8 + ram : ORIGIN = 0x80010000 , LENGTH = 3M
1.9 }
1.10
1.11 SECTIONS