1 /* 2 * Initialisation code for the stage 2 payload. 3 * 4 * Copyright 2009 (C) Qi Hardware Inc. 5 * Author: Wolfgang Spraul <wolfgang@sharism.cc> 6 * 7 * Copyright (C) 2015 Paul Boddie <paul@boddie.org.uk> 8 * 9 * This program is free software: you can redistribute it and/or modify 10 * it under the terms of the GNU General Public License as published by 11 * the Free Software Foundation, either version 3 of the License, or 12 * (at your option) any later version. 13 * 14 * This program is distributed in the hope that it will be useful, 15 * but WITHOUT ANY WARRANTY; without even the implied warranty of 16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 * GNU General Public License for more details. 18 * 19 * You should have received a copy of the GNU General Public License 20 * along with this program. If not, see <http://www.gnu.org/licenses/>. 21 */ 22 23 #include "sdram.h" 24 25 .text 26 .extern c_main 27 .extern _tlb_entry 28 .extern _exc_entry 29 .extern _irq_entry 30 .extern _end_entries 31 .extern _exc_stack 32 .globl _start 33 .set noreorder 34 35 _start: 36 /* Initialise the stacks. */ 37 38 la $sp, 0x80080000 39 la $k0, 0x80090000 40 la $k1, _exc_stack 41 sw $k0, 0($k1) 42 43 /* Initialise the globals pointer. */ 44 45 lui $gp, %hi(_GLOBAL_OFFSET_TABLE_) 46 ori $gp, $gp, %lo(_GLOBAL_OFFSET_TABLE_) 47 48 move $k0, $ra 49 50 /* Copy TLB handling instructions. */ 51 52 la $t0, _tlb_entry /* start */ 53 li $t1, 0x80000000 54 la $t2, _cache_entry /* end */ 55 jal _copy 56 nop 57 58 /* Copy cache handling instructions. */ 59 60 move $t0, $t2 /* start */ 61 li $t1, 0x80000100 62 la $t2, _exc_entry /* end */ 63 jal _copy 64 nop 65 66 /* Copy exception handling instructions. */ 67 68 move $t0, $t2 /* start */ 69 li $t1, 0x80000180 70 la $t2, _irq_entry /* end */ 71 jal _copy 72 nop 73 74 /* Copy IRQ handling instructions. */ 75 76 move $t0, $t2 /* start */ 77 li $t1, 0x80000200 78 la $t2, _end_entries /* end */ 79 jal _copy 80 nop 81 82 move $ra, $k0 83 84 /* Enable caching. */ 85 86 li $t0, CONFIG_CM_CACHABLE_NONCOHERENT 87 mtc0 $t0, $16 /* CP0_CONFIG */ 88 nop 89 90 /* Start the program. */ 91 92 j c_main 93 nop 94 95 _copy: 96 /* Copy via $t3 the region from $t0 to $t2 into $t1. */ 97 98 lw $t3, 0($t0) 99 addiu $t0, $t0, 4 100 sw $t3, 0($t1) 101 bne $t0, $t2, _copy 102 addiu $t1, $t1, 4 /* executed in delay slot before branch */ 103 j $ra 104 nop 105 106 .set reorder