1 /* 2 * Ben NanoNote board late initialisation, based on uboot-xburst and xburst-tools. 3 * 4 * Copyright (C) 2000-2009 Wolfgang Denk, DENX Software Engineering, <wd@denx.de> 5 * Copyright (C) 2006 Ingenic Semiconductor, <jlwei@ingenic.cn> 6 * Copyright (C) Xiangfu Liu <xiangfu.z@gmail.com> 7 * Copyright (C) 2015 Paul Boddie <paul@boddie.org.uk> 8 * 9 * This program is free software: you can redistribute it and/or modify 10 * it under the terms of the GNU General Public License as published by 11 * the Free Software Foundation, either version 3 of the License, or 12 * (at your option) any later version. 13 * 14 * This program is distributed in the hope that it will be useful, 15 * but WITHOUT ANY WARRANTY; without even the implied warranty of 16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 * GNU General Public License for more details. 18 * 19 * You should have received a copy of the GNU General Public License 20 * along with this program. If not, see <http://www.gnu.org/licenses/>. 21 */ 22 23 #include "board.h" 24 #include "nanonote.h" 25 26 /* Later initialisation functions. */ 27 28 void gpio_init2() 29 { 30 /* 31 * Initialize LCD pins 32 */ 33 __gpio_as_slcd_8bit(); 34 35 /* 36 * Initialize MSC pins 37 */ 38 __gpio_as_msc(); 39 40 /* 41 * Initialize Other pins 42 */ 43 unsigned int i; 44 for (i = 0; i < 7; i++){ 45 __gpio_as_input(GPIO_KEYIN_BASE + i); 46 __gpio_enable_pull(GPIO_KEYIN_BASE + i); 47 } 48 49 for (i = 0; i < 8; i++) { 50 __gpio_as_output(GPIO_KEYOUT_BASE + i); 51 __gpio_clear_pin(GPIO_KEYOUT_BASE + i); 52 } 53 54 /* enable the TP4, TP5 as UART0 */ 55 __gpio_jtag_to_uart0(); 56 57 __gpio_as_input(GPIO_KEYIN_8); 58 __gpio_enable_pull(GPIO_KEYIN_8); 59 60 __gpio_as_input(GPIO_POWER); 61 __gpio_enable_pull(GPIO_POWER); 62 63 __gpio_as_output(GPIO_AUDIO_POP); 64 __gpio_set_pin(GPIO_AUDIO_POP); 65 66 __gpio_as_output(GPIO_LCD_CS); 67 __gpio_clear_pin(GPIO_LCD_CS); 68 69 __gpio_as_output(GPIO_AMP_EN); 70 __gpio_clear_pin(GPIO_AMP_EN); 71 72 __gpio_as_output(GPIO_SDPW_EN); 73 __gpio_disable_pull(GPIO_SDPW_EN); 74 __gpio_clear_pin(GPIO_SDPW_EN); 75 76 __gpio_as_input(GPIO_SD_DETECT); 77 __gpio_disable_pull(GPIO_SD_DETECT); 78 79 __gpio_as_input(GPIO_USB_DETECT); 80 __gpio_enable_pull(GPIO_USB_DETECT); 81 } 82 83 void cpm_init() 84 { 85 __cpm_stop_ipu(); 86 __cpm_stop_cim(); 87 __cpm_stop_i2c(); 88 __cpm_stop_ssi(); 89 __cpm_stop_uart1(); 90 __cpm_stop_sadc(); 91 __cpm_stop_uhc(); 92 __cpm_stop_udc(); 93 __cpm_stop_aic1(); 94 /* __cpm_stop_aic2();*/ 95 } 96 97 void rtc_init() 98 { 99 while ( !__rtc_write_ready()); 100 __rtc_enable_alarm(); /* enable alarm */ 101 102 while ( !__rtc_write_ready()); 103 REG_RTC_RGR = 0x00007fff; /* type value */ 104 105 while ( !__rtc_write_ready()); 106 REG_RTC_HWFCR = 0x0000ffe0; /* Power on delay 2s */ 107 108 while ( !__rtc_write_ready()); 109 REG_RTC_HRCR = 0x00000fe0; /* reset delay 125ms */ 110 } 111 112 /* Timer routines. */ 113 114 unsigned long timestamp; 115 unsigned long lastdec; 116 117 /* 118 * Timer without interrupts. 119 */ 120 121 void timer_init() 122 { 123 __tcu_disable_pwm_output(TIMER_CHAN); 124 __tcu_select_extalclk(TIMER_CHAN); 125 __tcu_select_clk_div256(TIMER_CHAN); 126 __tcu_set_count(TIMER_CHAN, 0); 127 __tcu_set_half_data(TIMER_CHAN, 0); 128 __tcu_set_full_data(TIMER_CHAN, TIMER_FDATA); 129 130 __tcu_mask_half_match_irq(TIMER_CHAN); 131 __tcu_mask_full_match_irq(TIMER_CHAN); 132 __tcu_start_timer_clock(TIMER_CHAN); 133 __tcu_start_counter(TIMER_CHAN); 134 135 __cpm_start_tcu(); 136 137 lastdec = 0; 138 timestamp = 0; 139 } 140 141 /* Timer interrupt activation. */ 142 143 void timer_init_irq() 144 { 145 __tcu_unmask_full_match_irq(TIMER_CHAN); 146 __tcu_clear_full_match_flag(TIMER_CHAN); 147 __intc_unmask_irq(TIMER_CHAN_IRQ); 148 } 149 150 void timer_clear() 151 { 152 __intc_ack_irq(TIMER_CHAN_IRQ); 153 __tcu_clear_full_match_flag(TIMER_CHAN); 154 } 155 156 /* GPIO interrupt activation. */ 157 158 void gpio_init_irq() 159 { 160 /* 161 unsigned int i; 162 for (i = 0; i < 7; i++) { 163 __gpio_as_irq_rise_edge(GPIO_KEYIN_BASE + i); 164 } 165 */ 166 __gpio_as_irq_low_level(GPIO_POWER); 167 __intc_unmask_irq(GPIO_IRQ); 168 } 169 170 int gpio_have_irq(u8 gpio) 171 { 172 return (REG_GPIO_PXFLG(gpio / 32) & (1 << (gpio % 32))); 173 } 174 175 void gpio_clear(u8 gpio) 176 { 177 /* Clear interrupt status. */ 178 179 __gpio_ack_irq(gpio); 180 __intc_ack_irq(GPIO_IRQ); 181 } 182 183 /* Miscellaneous interrupt administration. */ 184 185 void irq_clear() 186 { 187 u8 i; 188 189 for (i = 0; i < 32; i++) { 190 if (REG_INTC_IPR & (1 << i)) 191 __intc_ack_irq(i); 192 } 193 } 194 195 /* Board startup detection. */ 196 197 int is_started() 198 { 199 return REG_CPM_CLKGR != 0; 200 }