1 /* 2 * Interrupt and TLB miss handling support. 3 * 4 * Copyright (C) 2015, 2016 Paul Boddie <paul@boddie.org.uk> 5 * 6 * This program is free software: you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License as published by 8 * the Free Software Foundation, either version 3 of the License, or 9 * (at your option) any later version. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 * GNU General Public License for more details. 15 * 16 * You should have received a copy of the GNU General Public License 17 * along with this program. If not, see <http://www.gnu.org/licenses/>. 18 */ 19 20 .text 21 .extern interrupt_handler 22 .extern current_registers 23 .extern current_stack_pointer 24 .globl _tlb_entry 25 .globl _exc_entry 26 .globl _irq_entry 27 .globl _end_entries 28 .globl _enter_task 29 .set noreorder 30 31 #include "paging.h" 32 33 _tlb_entry: 34 /* Get the bad address. */ 35 36 mfc0 $k0, $10 /* CP0_ENTRYHI */ 37 nop 38 andi $k1, $k0, 0xff /* ASID */ 39 40 /* For ASID == 0... */ 41 42 beqz $k1, _tlb_entry_direct 43 nop 44 45 /* Otherwise, load the page table entries. */ 46 47 andi $k1, $k0, 0xff /* ASID */ 48 li $k0, page_table_task_size 49 mul $k0, $k0, $k1 /* [ASID] (ASID * page_table_task_size) */ 50 li $k1, page_table_start /* page_table */ 51 addu $k1, $k0, $k1 /* page_table[ASID] */ 52 53 mfc0 $k0, $4 /* CP0_CONTEXT */ 54 nop 55 srl $k0, $k0, 1 /* use 8 byte - not 16 byte - entries */ 56 addu $k0, $k0, $k1 /* page_table[ASID][entry] */ 57 58 lw $k1, 0($k0) /* page_table[ASID][entry][0] */ 59 mtc0 $k1, $2 /* CP0_ENTRYLO0 */ 60 61 lw $k1, 4($k0) /* page_table[ASID][entry][1] */ 62 mtc0 $k1, $3 /* CP0_ENTRYLO1 */ 63 /* page size is 4KB */ 64 mtc0 $zero, $5 /* CP0_PAGEMASK */ 65 nop 66 67 tlbwr 68 nop 69 70 j _tlb_exit 71 nop 72 73 _tlb_entry_direct: 74 /* Otherwise, just translate the address directly. */ 75 76 li $k1, 0xffffe000 77 and $k0, $k0, $k1 /* VPN2 (8KB resolution) */ 78 srl $k0, $k0, 6 /* PFN (maintain 8KB resolution, bit 6 remaining zero) */ 79 ori $k0, $k0, 0x1e /* flags */ 80 81 mtc0 $k0, $2 /* CP0_ENTRYLO0 */ 82 ori $k0, $k0, 0x40 /* page size is 4KB (bit 6 set) */ 83 mtc0 $k0, $3 /* CP0_ENTRYLO1 */ 84 nop /* page size is 4KB */ 85 mtc0 $zero, $5 /* CP0_PAGEMASK */ 86 nop 87 88 tlbwr 89 nop 90 91 /* For ASID == 0... */ 92 93 andi $k1, $k0, 0xff /* ASID */ 94 bnez $k1, _tlb_exit 95 nop 96 eret 97 nop 98 99 _tlb_exit: 100 /* For ASID != 0... */ 101 102 lui $k0, %hi(enter_task) 103 ori $k0, $k0, %lo(enter_task) 104 jr $k0 105 nop 106 107 _exc_entry: 108 /* Handle TLB refill exceptions. */ 109 110 mfc0 $k0, $13 /* CP0_CAUSE */ 111 li $k1, 0x0000007c 112 and $k0, $k0, $k1 /* ExcCode << 2 */ 113 srl $k0, $k0, 2 /* ExcCode */ 114 addi $k1, $k0, -2 /* ExcCode == 2 */ 115 beqz $k1, _tlb_entry 116 addi $k1, $k0, -3 /* ExcCode == 3 */ 117 beqz $k1, _tlb_entry 118 nop 119 _fail: 120 b _fail 121 nop 122 123 _irq_entry: 124 /* Set the ASID. */ 125 126 mtc0 $zero, $10 /* CP0_ENTRYHI */ 127 nop 128 129 /* Obtain the kernel global offset table. */ 130 131 move $k0, $gp 132 lui $gp, %hi(_GLOBAL_OFFSET_TABLE_) 133 ori $gp, $gp, %lo(_GLOBAL_OFFSET_TABLE_) 134 135 /* Obtain a store of registers for the current task. */ 136 137 la $k1, current_registers 138 lw $k1, 0($k1) 139 140 /* Save registers that the assembler wants to trash. */ 141 142 sw $t9, 100($k1) 143 sw $k0, 104($k1) /* old gp */ 144 sw $ra, 112($k1) 145 146 /* Record the stack pointer. */ 147 148 la $k1, current_stack_pointer 149 lw $k1, 0($k1) /* &stack_pointers[current_task] */ 150 sw $sp, 0($k1) 151 152 /* Switch to the kernel stack. */ 153 154 li $sp, 0x80070000 155 156 /* Invoke the rest of the interrupt handling process. */ 157 158 la $k0, interrupt_handler 159 jr $k0 160 nop 161 162 _end_entries: 163 164 .set reorder