1 /* 2 * Interrupt and TLB miss handling support. 3 * 4 * Copyright (C) 2015, 2016 Paul Boddie <paul@boddie.org.uk> 5 * 6 * This program is free software: you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License as published by 8 * the Free Software Foundation, either version 3 of the License, or 9 * (at your option) any later version. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 * GNU General Public License for more details. 15 * 16 * You should have received a copy of the GNU General Public License 17 * along with this program. If not, see <http://www.gnu.org/licenses/>. 18 */ 19 20 .text 21 .extern interrupt_handler 22 .extern current_registers 23 .extern current_stack_pointer 24 .extern enter_task 25 .globl _tlb_entry 26 .globl _exc_entry 27 .globl _irq_entry 28 .globl _end_entries 29 .globl _enter_task 30 .set noreorder 31 32 #include "paging.h" 33 34 _tlb_entry: 35 /* Get the bad address. */ 36 37 mfc0 $k0, $10 /* CP0_ENTRYHI */ 38 nop 39 andi $k1, $k0, 0xff /* ASID */ 40 41 /* For ASID == 0... */ 42 43 beqz $k1, _tlb_entry_direct 44 nop 45 46 /* For addresses over 0x00080000... */ 47 48 li $k1, 0xfff80000 49 and $k1, $k0, $k1 50 bnez $k1, _tlb_entry_direct 51 nop 52 53 /* Otherwise, load the page table entries. */ 54 55 andi $k1, $k0, 0xff /* ASID */ 56 li $k0, page_table_task_size 57 mul $k0, $k0, $k1 /* [ASID] (ASID * page_table_task_size) */ 58 li $k1, page_table_start /* page_table */ 59 addu $k1, $k0, $k1 /* page_table[ASID] */ 60 61 mfc0 $k0, $4 /* CP0_CONTEXT */ 62 nop 63 srl $k0, $k0, 1 /* use 8 byte - not 16 byte - entries */ 64 addu $k0, $k0, $k1 /* page_table[ASID][entry] */ 65 66 lw $k1, 0($k0) /* page_table[ASID][entry][0] */ 67 mtc0 $k1, $2 /* CP0_ENTRYLO0 */ 68 69 lw $k1, 4($k0) /* page_table[ASID][entry][1] */ 70 mtc0 $k1, $3 /* CP0_ENTRYLO1 */ 71 /* page size is 4KB */ 72 mtc0 $zero, $5 /* CP0_PAGEMASK */ 73 nop 74 75 tlbwr 76 nop 77 78 j _tlb_exit 79 nop 80 81 _tlb_entry_direct: 82 /* Otherwise, just translate the address directly. */ 83 84 li $k1, 0xffffe000 85 and $k0, $k0, $k1 /* VPN2 (8KB resolution) */ 86 srl $k0, $k0, 6 /* PFN (maintain 8KB resolution, bit 6 remaining zero) */ 87 ori $k0, $k0, 0x1e /* flags */ 88 89 mtc0 $k0, $2 /* CP0_ENTRYLO0 */ 90 ori $k0, $k0, 0x40 /* page size is 4KB (bit 6 set) */ 91 mtc0 $k0, $3 /* CP0_ENTRYLO1 */ 92 nop /* page size is 4KB */ 93 mtc0 $zero, $5 /* CP0_PAGEMASK */ 94 nop 95 96 tlbwr 97 nop 98 99 _tlb_exit: 100 lui $k0, %hi(_enter_task) 101 ori $k0, $k0, %lo(_enter_task) 102 lw $k1, 0($k0) 103 jr $k1 104 nop 105 106 _exc_entry: 107 /* Handle TLB refill exceptions. */ 108 109 mfc0 $k0, $13 /* CP0_CAUSE */ 110 li $k1, 0x0000007c 111 and $k0, $k0, $k1 /* ExcCode << 2 */ 112 srl $k0, $k0, 2 /* ExcCode */ 113 addi $k1, $k0, -2 /* ExcCode == 2 */ 114 beqz $k1, _tlb_entry 115 addi $k1, $k0, -3 /* ExcCode == 3 */ 116 beqz $k1, _tlb_entry 117 nop 118 _fail: 119 b _fail 120 nop 121 122 _irq_entry: 123 /* Set the ASID. */ 124 125 mtc0 $zero, $10 /* CP0_ENTRYHI */ 126 nop 127 128 /* Obtain the kernel global offset table. */ 129 130 move $k0, $gp 131 lui $gp, %hi(_GLOBAL_OFFSET_TABLE_) 132 ori $gp, $gp, %lo(_GLOBAL_OFFSET_TABLE_) 133 134 /* Obtain a store of registers for the current task. */ 135 136 la $k1, current_registers 137 lw $k1, 0($k1) 138 139 /* Save registers that the assembler wants to trash. */ 140 141 sw $t9, 100($k1) 142 sw $k0, 104($k1) /* old gp */ 143 sw $ra, 112($k1) 144 145 /* Record the stack pointer. */ 146 147 la $k1, current_stack_pointer 148 lw $k1, 0($k1) /* &stack_pointers[current_task] */ 149 sw $sp, 0($k1) 150 151 /* Switch to the kernel stack. */ 152 153 li $sp, 0x80070000 154 155 /* Invoke the rest of the interrupt handling process. */ 156 157 la $k0, interrupt_handler 158 jr $k0 159 nop 160 161 _end_entries: 162 163 .set reorder