1 /* 2 * Interrupt and TLB miss handling support. 3 * 4 * Copyright (C) 2015, 2016 Paul Boddie <paul@boddie.org.uk> 5 * 6 * This program is free software: you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License as published by 8 * the Free Software Foundation, either version 3 of the License, or 9 * (at your option) any later version. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 * GNU General Public License for more details. 15 * 16 * You should have received a copy of the GNU General Public License 17 * along with this program. If not, see <http://www.gnu.org/licenses/>. 18 */ 19 20 .text 21 .extern interrupt_handler 22 .extern current_registers 23 .extern current_stack_pointer 24 .globl _tlb_entry 25 .globl _exc_entry 26 .globl _irq_entry 27 .globl _end_entries 28 .set noreorder 29 30 #include "paging.h" 31 32 _tlb_entry: 33 /* Get the bad address. */ 34 35 mfc0 $k0, $10 /* CP0_ENTRYHI */ 36 nop 37 andi $k1, $k0, 0xff /* ASID */ 38 39 /* For ASID == 0... */ 40 41 beqz $k1, _tlb_entry_direct 42 nop 43 44 /* Otherwise, load the page table entries. */ 45 46 andi $k1, $k0, 0xff /* ASID */ 47 li $k0, page_table_task_size 48 mul $k0, $k0, $k1 /* [ASID] (ASID * page_table_task_size) */ 49 li $k1, page_table_start /* page_table */ 50 addu $k1, $k0, $k1 /* page_table[ASID] */ 51 52 mfc0 $k0, $4 /* CP0_CONTEXT */ 53 nop 54 srl $k0, $k0, 1 /* use 8 byte - not 16 byte - entries */ 55 addu $k0, $k0, $k1 /* page_table[ASID][entry] */ 56 57 lw $k1, 0($k0) /* page_table[ASID][entry][0] */ 58 mtc0 $k1, $2 /* CP0_ENTRYLO0 */ 59 60 lw $k1, 4($k0) /* page_table[ASID][entry][1] */ 61 mtc0 $k1, $3 /* CP0_ENTRYLO1 */ 62 /* page size is 4KB */ 63 mtc0 $zero, $5 /* CP0_PAGEMASK */ 64 nop 65 66 tlbwr 67 nop 68 69 eret 70 nop 71 72 _tlb_entry_direct: 73 /* Otherwise, just translate the address directly. */ 74 75 li $k1, 0xffffe000 76 and $k0, $k0, $k1 /* VPN2 (8KB resolution) */ 77 srl $k0, $k0, 6 /* PFN (maintain 8KB resolution, bit 6 remaining zero) */ 78 ori $k0, $k0, 0x1e /* flags */ 79 80 mtc0 $k0, $2 /* CP0_ENTRYLO0 */ 81 ori $k0, $k0, 0x40 /* page size is 4KB (bit 6 set) */ 82 mtc0 $k0, $3 /* CP0_ENTRYLO1 */ 83 nop /* page size is 4KB */ 84 mtc0 $zero, $5 /* CP0_PAGEMASK */ 85 nop 86 87 tlbwr 88 nop 89 90 eret 91 nop 92 93 _exc_entry: 94 /* Handle TLB refill exceptions. */ 95 96 mfc0 $k0, $13 /* CP0_CAUSE */ 97 li $k1, 0x0000007c 98 and $k0, $k0, $k1 /* ExcCode << 2 */ 99 srl $k0, $k0, 2 /* ExcCode */ 100 addi $k1, $k0, -2 /* ExcCode == 2 */ 101 beqz $k1, _tlb_entry 102 addi $k1, $k0, -3 /* ExcCode == 3 */ 103 beqz $k1, _tlb_entry 104 nop 105 _fail: 106 b _fail 107 nop 108 109 _irq_entry: 110 /* Set the ASID. */ 111 112 mtc0 $zero, $10 /* CP0_ENTRYHI */ 113 nop 114 115 /* Obtain the kernel global offset table. */ 116 117 move $k0, $gp 118 lui $gp, %hi(_GLOBAL_OFFSET_TABLE_) 119 ori $gp, $gp, %lo(_GLOBAL_OFFSET_TABLE_) 120 121 /* Obtain a store of registers for the current task. */ 122 123 la $k1, current_registers 124 lw $k1, 0($k1) 125 126 /* Save registers that the assembler wants to trash. */ 127 128 sw $t9, 100($k1) 129 sw $k0, 104($k1) /* old gp */ 130 sw $ra, 112($k1) 131 132 /* Record the stack pointer. */ 133 134 la $k1, current_stack_pointer 135 lw $k1, 0($k1) /* &stack_pointers[current_task] */ 136 sw $sp, 0($k1) 137 138 /* Switch to the kernel stack. */ 139 140 li $sp, 0x80070000 141 142 /* Invoke the rest of the interrupt handling process. */ 143 144 la $k0, interrupt_handler 145 jr $k0 146 nop 147 148 _end_entries: 149 150 .set reorder