# HG changeset patch
# User Paul Boddie <paul@boddie.org.uk>
# Date 1461443451 -7200
# Node ID 364542dab16bd02acdfe2175945bb1ba0d02a3f2
# Parent  e572b72b9a83a7e5a3a8e601ad3c128c283c72aa
Properly reset the TLB mappings.

diff -r e572b72b9a83 -r 364542dab16b stage2/cpu.c
--- a/stage2/cpu.c	Sat Apr 23 18:19:38 2016 +0200
+++ b/stage2/cpu.c	Sat Apr 23 22:30:51 2016 +0200
@@ -160,9 +160,6 @@
 
 	asm volatile(
 		"mtc0 $zero, $4\n"	/* CP0_CONTEXT */
-		"mtc0 $zero, $10\n"	/* CP0_ENTRYHI */
-		"mtc0 $zero, $2\n"	/* CP0_ENTRYLO0 */
-		"mtc0 $zero, $3\n"	/* CP0_ENTRYLO1 */
 		"mtc0 %1, $6\n"		/* CP0_WIRED */
 		"mfc0 %0, $16\n"	/* CP0_CONFIG1 */
 		"nop"
@@ -174,12 +171,7 @@
 
 	for (i = 0; i < ((limit >> 25) & 0x3f); i++)
 	{
-		asm volatile(
-			"mtc0 %0, $0\n"	/* CP0_INDEX */
-			"nop"
-			:
-			: "r" (i)
-			);
+		map_page_index(0, 0, 4096, 0, 0, i);
 	}
 }