# HG changeset patch # User Paul Boddie # Date 1456592211 -3600 # Node ID 9e9d063cdfd163ed9bd887d3695877eab08283aa # Parent fe0c2c187dda87955e2bc475872436ea9665a9c4 Added a generic exception handler to handle TLB misses during exceptions. diff -r fe0c2c187dda -r 9e9d063cdfd1 stage2/entry.S --- a/stage2/entry.S Sat Feb 27 17:23:49 2016 +0100 +++ b/stage2/entry.S Sat Feb 27 17:56:51 2016 +0100 @@ -20,6 +20,7 @@ .text .extern interrupt_handler .globl _tlb_entry +.globl _exc_entry .globl _irq_entry .globl _end_entries .set noreorder @@ -27,7 +28,6 @@ /* NOTE: Duplicated from cpu.h. */ #define page_table_start 0x00040000 -#define page_table_task_size 0x00008000 #define page_table_task_size_log2 15 _tlb_entry: @@ -94,6 +94,22 @@ eret nop +_exc_entry: + /* Handle TLB refill exceptions. */ + + mfc0 $k0, $13 /* CP0_CAUSE */ + li $k1, 0x0000007c + and $k0, $k0, $k1 /* ExcCode << 2 */ + srl $k0, $k0, 2 /* ExcCode */ + addi $k1, $k0, -2 /* ExcCode == 2 */ + beqz $k1, _tlb_entry + addi $k1, $k0, -3 /* ExcCode == 3 */ + beqz $k1, _tlb_entry + nop +_fail: + b _fail + nop + _irq_entry: /* Save registers that the assembler wants to trash. */ diff -r fe0c2c187dda -r 9e9d063cdfd1 stage2/head2.S --- a/stage2/head2.S Sat Feb 27 17:23:49 2016 +0100 +++ b/stage2/head2.S Sat Feb 27 17:56:51 2016 +0100 @@ -24,6 +24,8 @@ .text .extern c_main +.extern _tlb_entry +.extern _exc_entry .extern _irq_entry .extern _end_entries .extern _got_start @@ -63,6 +65,14 @@ la $t0, _tlb_entry /* start */ li $t1, 0x80000000 + la $t2, _exc_entry /* end */ + jal _copy + nop + + /* Copy exception handling instructions. */ + + la $t0, _exc_entry /* start */ + li $t1, 0x80000180 la $t2, _irq_entry /* end */ jal _copy nop