# HG changeset patch
# User Paul Boddie <paul@boddie.org.uk>
# Date 1434287532 -7200
# Node ID a7506b1342b9c054bedacd1eaef5d52940a99342
# Parent  c73e7b7654d53f05d4268e85dc8549755c488dab
Switched to xbboot usage which supports the revised stage 2 payload.

diff -r c73e7b7654d5 -r a7506b1342b9 boot_usb
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/boot_usb	Sun Jun 14 15:12:12 2015 +0200
@@ -0,0 +1,10 @@
+#!/bin/sh
+
+xbboot set_addr 0x80002000
+xbboot bulk_write stage1/stage1.bin
+xbboot start1 0x80002000
+xbboot get_info
+xbboot flush_cache
+xbboot set_addr 0x80010000
+xbboot bulk_write stage2/stage2.bin
+xbboot start2 0x80010000
diff -r c73e7b7654d5 -r a7506b1342b9 stage1/board.c
--- a/stage1/board.c	Sun Jun 14 15:11:34 2015 +0200
+++ b/stage1/board.c	Sun Jun 14 15:12:12 2015 +0200
@@ -49,10 +49,13 @@
 
         fw_args = (struct fw_args *)0x80002008;
         FW_CPU_ID = fw_args->cpu_id ;
-        FW_SDRAM_BW16 = fw_args->bus_width;
-        FW_SDRAM_BANK4 = fw_args->bank_num;
-        FW_SDRAM_ROW = fw_args->row_addr;
-        FW_SDRAM_COL = fw_args->col_addr;
+
+	/* Where the arguments have not been initialised, use the defaults. */
+
+        FW_SDRAM_BW16 = FW_CPU_ID ? fw_args->bus_width : SDRAM_BW16;
+        FW_SDRAM_BANK4 = FW_CPU_ID ? fw_args->bank_num : SDRAM_BANK4;
+        FW_SDRAM_ROW = FW_CPU_ID ? fw_args->row_addr : SDRAM_ROW;
+        FW_SDRAM_COL = FW_CPU_ID ? fw_args->col_addr : SDRAM_COL;
         FW_CONFIG_MOBILE_SDRAM = fw_args->is_mobile;
         FW_IS_SHARE = fw_args->is_busshare;
 }