# HG changeset patch # User Paul Boddie # Date 1456242621 -3600 # Node ID b90ecab4addbecd6e0e9fca47d18f73ed91bdd3e # Parent 8e4b91a86b3aa00907779dc51566e02020c190d6 Removed spurious initial TLB mapping, exposing the actual replacement mechanism. Fixed physical address range values in TLB mappings. Lowered the random mapping index floor. diff -r 8e4b91a86b3a -r b90ecab4addb stage2/cpu.c --- a/stage2/cpu.c Tue Feb 23 15:31:58 2016 +0100 +++ b/stage2/cpu.c Tue Feb 23 16:50:21 2016 +0100 @@ -127,7 +127,7 @@ asm volatile( "li $t0, 0x01ffe000\n" /* 16MB */ "mtc0 $t0, $5\n" /* CP0_PAGEMASK */ - "li $t1, 2\n" /* index of first randomly-replaced entry */ + "li $t1, 1\n" /* index of first randomly-replaced entry */ "mtc0 $t1, $6\n" /* CP0_WIRED */ /* 0x80000000..0x82000000 -> 0x00000000..0x02000000 */ @@ -149,16 +149,14 @@ "tlbwi\n" "nop\n"); - - map_page(0x00000000, 0x00000000, 16 * 1024 * 1024); } void map_page(u32 virtual, u32 physical, u32 pagesize) { u32 start = virtual & 0xffffe000; /* VPN2 */ u32 flags = 0x1f; /* C=3, dirty, global, valid */ - u32 lower = ((physical & 0xffffc000) >> 6) | flags; - u32 upper = (((physical + pagesize) & 0xffffc000) >> 6) | flags; + u32 lower = ((physical & 0xfffff000) >> 6) | flags; + u32 upper = (((physical + pagesize) & 0xfffff000) >> 6) | flags; u32 pagemask = ((pagesize - 1) & 0xfffff000) << 1; asm volatile(