NanoPayload

Shortlog

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2016-03-11 Paul Boddie Moved board-specific timer operations to the appropriate files.
2016-03-01 Paul Boddie Allow task zero to plot a pattern and to run with the other tasks.
2016-03-01 Paul Boddie Moved paging definitions into a new header file, adjusting the table address.
2016-02-29 Paul Boddie Switched to using stacks accessible via the same virtual address region.
2016-02-29 Paul Boddie Switched to mapped stack regions, keeping stack pointers within their regions.
2016-02-29 Paul Boddie Added missing multiplication registers to loading and storing.
2016-02-29 Paul Boddie Added explicit clearing of TLB mappings.
2016-02-29 Paul Boddie Fixed page table indexing in the TLB miss handler.
2016-02-28 Paul Boddie Introduced kernel regions for task register storage.
2016-02-27 Paul Boddie Removed superfluous TLB mapping entry.
2016-02-27 Paul Boddie Put the page tables and the stacks in unmapped space, with the stacks occupying
2016-02-27 Paul Boddie Tidied up stack location calculations.
2016-02-27 Paul Boddie Added a generic exception handler to handle TLB misses during exceptions.
2016-02-27 Paul Boddie Minor formatting changes.
2016-02-27 Paul Boddie Fixed absent EPC initialisation.
2016-02-27 Paul Boddie Permit different test patterns.
2016-02-27 Paul Boddie Masking interrupts should not be necessary.
2016-02-26 Paul Boddie Introduced more immediate TLB miss handling in order to avoid stack usage and
2016-02-26 Paul Boddie Added a potentially useful TLB page miss mapping function.
2016-02-26 Paul Boddie Introduced a method of invoking task routines for testing.
2016-02-26 Paul Boddie Added elements of a task switching mechanism.
2016-02-26 Paul Boddie Introduced the start of a more complicated page mapping scheme.
2016-02-25 Paul Boddie Separated error level and interrupt initialisation.
2016-02-25 Paul Boddie Added missing ASID sections to EntryHi register values.
2016-02-25 Paul Boddie Moved status register saving and adjustment, saving the unmodified value.
2016-02-25 Paul Boddie Make a copy of the global offset table for user mode use.
2016-02-24 Paul Boddie Attempt to prevent a system hang by saving certain registers early.
2016-02-24 Paul Boddie Ensure that the GP is set up appropriately for interrupt and TLB miss handling.
2016-02-24 Paul Boddie Disable user mode transitions for now.
2016-02-24 Paul Boddie Fixed the operation of the enter_user_mode function.
2016-02-24 Paul Boddie Merged changes from the branch upon reverting to position-independent code.
2016-02-24 Paul Boddie Switched to position-independent code to enable user mode execution. stage2-non-pic
2016-02-23 Paul Boddie Pass parameters to the plot_pattern function. stage2-non-pic
2016-02-23 Paul Boddie Merged fixes. stage2-non-pic
2016-02-23 Paul Boddie Fixed initial TLB mapping. stage2-non-pic
2016-02-23 Paul Boddie Moved tlb_handle into the interrupt handling file. Added an idle wait loop. stage2-non-pic
2016-02-23 Paul Boddie Added index-based page mapping and page unmapping functions, allowing flags and stage2-non-pic
2016-02-23 Paul Boddie Removed spurious initial TLB mapping, exposing the actual replacement mechanism. stage2-non-pic
2016-02-23 Paul Boddie Enter user mode before starting the task. stage2-non-pic
2016-02-22 Paul Boddie Introduced elementary TLB handling; separated out register saving and loading. stage2-non-pic
2016-02-22 Paul Boddie Introduced a page mapping function. stage2-non-pic
2016-02-22 Paul Boddie Converted various multi-line macros into inline functions. stage2-non-pic
2016-02-22 Paul Boddie Removed probably superfluous no-operations and tidied slightly. stage2-non-pic
2016-02-22 Paul Boddie Mask interrupts while handling them, saving the status and EPC registers. stage2-non-pic
2016-01-28 Paul Boddie Allow the power button to trigger an interrupt, although handling does not work. stage2-non-pic
2016-01-27 Paul Boddie Employ normal GPIO level-testing to affect the test pattern, with the power stage2-non-pic
2016-01-26 Paul Boddie Attempted unsuccessfully to use GPIO interrupts. stage2-non-pic
2016-01-26 Paul Boddie Added a function to set the pixel depth for future use. stage2-non-pic
2016-01-26 Paul Boddie Correct bpp discrepancy. stage2-non-pic
2016-01-26 Paul Boddie Experiment with a different test pattern. stage2-non-pic
2016-01-26 Paul Boddie Supported 4bpp modes with a simple 121 4-bit RGB mapping. stage2-non-pic
2016-01-25 Paul Boddie Made the palette size correspond to the pixel depth. stage2-non-pic
2016-01-25 Paul Boddie Added support for 8bpp output with a simple 332 8-bit RGB palette mapping. stage2-non-pic
2016-01-25 Paul Boddie Added 16bpp support, fixed/improved dual panel support, handled apparent stage2-non-pic
2016-01-25 Paul Boddie Fixed region mapping comment. stage2-non-pic
2016-01-25 Paul Boddie Merged the allocated memory regions into one. stage2-non-pic
2016-01-25 Paul Boddie Tidied up the memory allocation of the palette and framebuffer regions. stage2-non-pic
2016-01-25 Paul Boddie Break up mode-specific parts of the LCD initialisation into separate functions. stage2-non-pic
2016-01-24 Paul Boddie Employed more accurate/appropriate types in structures and removed virtual stage2-non-pic
2016-01-24 Paul Boddie Use proper pointer arithmetic to initialise structure pointer members. stage2-non-pic
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