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Added 625-line, 312/313 scanline notes. |
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Added a note about the 2MHz RAM access enhancement. |
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Added RAM access corrections related to CPU activity plus bandwidth figures. |
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Added multiple CPU stack "MMU" enhancement. |
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Added region blanking and display suspend notes. |
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Added ByteDelight.com 4164 chips source. |
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Added notes about sideways RAM/ROM access, flashing colours, and the ULA socket. |
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Added copyright and licensing information. |
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Added Amstrad CPC-related note. |
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Added notes about cartridges, Econet, and region filling. |
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Merged general changes. |
shedskin |
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Added an explicit branch to track Shedskin-specific changes. |
shedskin |
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Introduced a shift register abstraction for the ULA's internal state. |
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Added Unicorn Electronics references for RAM and CPU chips. |
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Added more RAM timing details and compared different ICs. |
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Added a note about a possible memory filling capability. |
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Added notes about a display suspend capability. |
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Merged general changes. |
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Added some clarifications about the implementation of an expanded palette. |
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Added initial support for CPU address and data propagation. |
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Added a note about a mechanism to allow more flexible colour output, marking the |
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Improved the assessment of various RAM ICs, adding other product details. |
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Added information on the RAM ICs and modern replacement parts. |
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Added enhancement clarifications to various headings along with a |
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Added more details about how palette data would be inverted in order to cause |
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Described how the inversion bitmap would be used to update each flashing colour. |
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Fixed the description of flashing colours since all logical colours can be made |
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Added a note about flashing colours. |
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Modelled the state of the ULA with a collection of latches instead of a counter. |
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Added a note about increased component performance and bandwidth consequences. |
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Updated the interpretation of how the RAM ICs are accessed by the ULA. |
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Added display circuitry note. |
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Added video, audio and general notes. |
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Minor type-related change discovered through Shedskin compilation. |
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Merged general changes. |
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Added notes on interrupt generation and ROM paging. |
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Simplified the logic slightly around reading and displaying pixels. |
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Merged RAM and video changes. |
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Introduced RAM access simulation, attempting to support the mechanism through |
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Improved the general timing description and revised the access event timeline. |
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Changed the description of the memory access behaviour after consulting the TM4164EC4 datasheet. |
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Improved the timing notes, adding information about the memory access mechanism |
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Added more timing notes to the ULA document. |
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Fixed character attribute calculations, noting that attribute data is only |
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Updated notes on hardware sprites and character attribute modes. |
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Added some timing information and some general notes on system improvements. |
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Merged general architecture-related changes. |
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Introduced a separate video abstraction, making the ULA responsible for |
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Null merge of general changes introducing features already present on this branch. |
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Replaced the use of nested lists with a flat, genuine, global screen array |
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Replaced the use of nested lists with a flat, genuine, global screen array. |
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Changed the update function to build a new screen array on every invocation, |
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Merged general changes. |
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Fixed the width of the temporary surface. |
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Added notes on alternative screen mode configurations, screen height adjustment and character attributes. |
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Merged general changes. |
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Moved the vertical scaling into the main program, ensuring that the ULA only |
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Merged general changes. |
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Replaced array usage with much simpler list operations. |
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Removed obsolete comment. |
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