paul@0 | 1 | #ifndef __PIC32_H__ |
paul@0 | 2 | #define __PIC32_H__ |
paul@0 | 3 | |
paul@0 | 4 | /* See... |
paul@0 | 5 | * TABLE 4-1: SFR MEMORYMAP |
paul@0 | 6 | * TABLE 11-3: PORTA REGISTER MAP |
paul@0 | 7 | * 11.2 CLR, SET and INV Registers |
paul@0 | 8 | * PIC32MX1XX/2XX 28/36/44-pin Family Data Sheet |
paul@0 | 9 | */ |
paul@0 | 10 | |
paul@0 | 11 | #define T1CON 0xBF800600 |
paul@0 | 12 | #define TMR1 0xBF800610 |
paul@0 | 13 | #define PR1 0xBF800620 |
paul@0 | 14 | |
paul@0 | 15 | #define PMCON 0xBF807000 |
paul@0 | 16 | #define PMMODE 0xBF807010 |
paul@0 | 17 | #define PMADDR 0xBF807020 |
paul@0 | 18 | #define PMDOUT 0xBF807030 |
paul@0 | 19 | #define PMDIN 0xBF807040 |
paul@0 | 20 | #define PMAEN 0xBF807050 |
paul@0 | 21 | #define PMSTAT 0xBF807060 |
paul@0 | 22 | |
paul@0 | 23 | #define OSCCON 0xBF80F000 |
paul@0 | 24 | #define CFGCON 0xBF80F200 |
paul@0 | 25 | #define SYSKEY 0xBF80F230 |
paul@0 | 26 | |
paul@0 | 27 | #define IFS0 0xBF881030 |
paul@0 | 28 | #define IFS1 0xBF881040 |
paul@0 | 29 | #define IEC0 0xBF881060 |
paul@0 | 30 | #define IEC1 0xBF881070 |
paul@0 | 31 | #define IPC1 0xBF8810A0 |
paul@0 | 32 | #define IPC7 0xBF881100 |
paul@0 | 33 | #define IPC8 0xBF881110 |
paul@0 | 34 | |
paul@0 | 35 | #define BMXCON 0xBF882000 |
paul@0 | 36 | #define BMXDRMSZ 0xBF882040 |
paul@0 | 37 | |
paul@0 | 38 | #define ANSELA 0xBF886000 |
paul@0 | 39 | #define TRISA 0xBF886010 |
paul@0 | 40 | #define PORTA 0xBF886020 |
paul@0 | 41 | #define LATA 0xBF886030 |
paul@0 | 42 | #define ODCA 0xBF886040 |
paul@0 | 43 | #define ANSELB 0xBF886100 |
paul@0 | 44 | #define TRISB 0xBF886110 |
paul@0 | 45 | #define PORTB 0xBF886120 |
paul@0 | 46 | #define LATB 0xBF886130 |
paul@0 | 47 | #define ODCB 0xBF886140 |
paul@0 | 48 | |
paul@0 | 49 | #define CLR 0x4 |
paul@0 | 50 | #define SET 0x8 |
paul@0 | 51 | #define INV 0xC |
paul@0 | 52 | |
paul@0 | 53 | #endif /* __PIC32_H__ */ |